{"meta":{"query_hash":"03dc0d8aea75","filters":{"venue":"IEEE Computer Architecture Letters"},"cohort_total":16,"direct_labels_cover":0,"predictions_cover":16,"exported":16,"export_cap":100000,"truncated":false,"label_status":"direct model label, unvalidated","prediction_status":"machine_predicted_unvalidated (Codex and Gemma teacher distillation)","score_status":"score_only:v0-immature-baseline","snapshot":{"source":"OpenAlex, pinned release, all 482 partitions","release":"2026-06-24","frame_built":"2026-07-12"},"permalink":"https://metacan.xera.ac/q/03dc0d8aea75","api":"https://metacan.xera.ac/api/v1/cohort?venue=IEEE+Computer+Architecture+Letters"},"results":[{"id":"W1997480558","doi":"10.1109/l-ca.2013.25","title":"Soft Failures in Large Datacenters","year":2013,"lang":"en","type":"article","venue":"IEEE Computer Architecture Letters","topic":"Cloud Computing and Resource Management","field":"Computer Science","cited_by":4,"is_retracted":false,"has_abstract":true,"route_ca_aff":true,"route_ca_fund":false,"route_ca_venue":false,"route_about_ca":false,"ca_institutions":"Advanced Micro Devices (Canada)","funders":"","keywords":"Downtime; Computer science; Reliability (semiconductor); Server; Software deployment; Reliability engineering; Service (business); Process (computing); Failure rate; Distributed computing; Computer network; Operating system; Engineering","score_opus":0.006245073071234186,"score_gpt":0.2008537937629733,"score_spread":0.19460872069173912,"validation_status":"score_only:v0-immature-baseline","prediction":{"id":"W1997480558","genre_codex":"empirical","genre_gemma":"empirical","domain_codex":null,"domain_gemma":null,"model_version":"metacan-v3-hybrid-931329e0061c","genre_candidate":"empirical","genre_consensus":"empirical","domain_candidate":null,"domain_consensus":null,"prediction_status":"machine_predicted_unvalidated","genre_scores_codex":[0.8424905,0.0017760422,0.14871055,0.0009585918,0.000118520584,0.000091790476,0.00030503928,0.0012270063,0.0043218946],"genre_scores_gemma":[0.9954952,0.00020139913,0.003700175,0.00005226066,0.00003204367,0.000018930588,0.00005330976,0.000035850844,0.00041087263],"study_design_codex":"simulation_or_modeling","study_design_gemma":"observational","domain_scores_codex":[0.9992061,0.00016726484,0.000044507004,0.00016520375,0.00027149782,0.00014541259],"domain_scores_gemma":[0.9955128,0.0017706021,0.001143764,0.0004299829,0.00068300625,0.00045985568],"candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0010541747,0.00066857715,0.0007375586,0.0011644446,0.00095586444,0.001126202,0.0007882471,0.00058442005,0.0010783677],"category_scores_gemma":[0.005071871,0.00043446646,0.00023827144,0.0011076381,0.0012415821,0.001560268,0.0010313066,0.00084444287,0.00025708732],"study_design_candidate":"observational","study_design_consensus":null,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_system_candidate":false,"about_ca_system_consensus":false,"study_design_scores_codex":[0.0006752956,0.00019088793,0.047117572,0.00042130591,0.00009477471,0.001697272,0.000666702,0.8390173,0.034059513,0.014006501,0.0066405055,0.055412453],"study_design_scores_gemma":[0.000056650402,0.00026844145,0.032822054,0.000048601625,0.000041779713,0.0007881727,0.00081138714,0.9222363,0.008046741,0.032241512,0.0025801426,0.00005816648],"about_ca_topic_score_codex":0.005393365,"about_ca_topic_score_gemma":0.0031668232,"teacher_disagreement_score":0.005393365,"about_ca_system_score_codex":0.0010845218,"about_ca_system_score_gemma":0.00059307046,"threshold_uncertainty_score":0.0107239485},"labels":[],"label_agreement":null},{"id":"W2114562199","doi":"10.1109/l-ca.2007.9","title":"A Building Block for Coarse-Grain Optimizations in the On-Chip Memory Hierarchy","year":2007,"lang":"en","type":"article","venue":"IEEE Computer Architecture Letters","topic":"Parallel Computing and Optimization Techniques","field":"Computer Science","cited_by":0,"is_retracted":false,"has_abstract":true,"route_ca_aff":true,"route_ca_fund":false,"route_ca_venue":false,"route_about_ca":false,"ca_institutions":"University of Toronto","funders":"","keywords":"Computer science; Cache; Memory hierarchy; Block (permutation group theory); Exploit; Parallel computing; Chip; Hierarchy; CPU cache; Block size; Multiprocessing; Reduction (mathematics); System on a chip; Embedded system; Operating system; Key (lock); Telecommunications","score_opus":0.01489042866387479,"score_gpt":0.2646361284728493,"score_spread":0.2497456998089745,"validation_status":"score_only:v0-immature-baseline","prediction":{"id":"W2114562199","genre_codex":"methods","genre_gemma":"methods","domain_codex":null,"domain_gemma":null,"model_version":"metacan-v3-hybrid-931329e0061c","genre_candidate":"methods","genre_consensus":"methods","domain_candidate":null,"domain_consensus":null,"prediction_status":"machine_predicted_unvalidated","genre_scores_codex":[0.1591151,0.0012402316,0.8209546,0.0006319766,0.000108279324,0.00016245988,0.00014646543,0.0038890068,0.013751756],"genre_scores_gemma":[0.71443695,0.00040421056,0.28078502,0.00030553577,0.000045559682,0.00015504472,0.00020089281,0.00033547965,0.0033312808],"study_design_codex":"simulation_or_modeling","study_design_gemma":"simulation_or_modeling","domain_scores_codex":[0.99981064,0.000031767104,0.000010743307,0.000032039963,0.000081319755,0.000033595912],"domain_scores_gemma":[0.9996327,0.00007650069,0.000035929257,0.00017486303,0.00006143376,0.000018469558],"candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.00025484746,0.00024924392,0.00033514813,0.00029299632,0.00043642527,0.00064032676,0.00094052975,0.0004109894,0.0014179439],"category_scores_gemma":[0.0010153479,0.00030192957,0.00028087592,0.00046764687,0.0004037609,0.0010359441,0.00048480195,0.0010044164,0.0004284461],"study_design_candidate":"simulation_or_modeling","study_design_consensus":"simulation_or_modeling","about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_system_candidate":false,"about_ca_system_consensus":false,"study_design_scores_codex":[0.0002873472,0.0003383044,0.0033932368,0.0003842112,0.000116238196,0.0001958598,0.00037858967,0.33816978,0.3000535,0.06564735,0.0077222367,0.28331333],"study_design_scores_gemma":[0.0001162091,0.00064420793,0.0031461434,0.000059018188,0.000119748736,0.00022757499,0.0001259541,0.8004177,0.1169576,0.038187053,0.03994203,0.000056724224],"about_ca_topic_score_codex":0.0017842818,"about_ca_topic_score_gemma":0.0041651344,"teacher_disagreement_score":0.0017842818,"about_ca_system_score_codex":0.00048753494,"about_ca_system_score_gemma":0.0010672117,"threshold_uncertainty_score":0.004743457},"labels":[],"label_agreement":null},{"id":"W2156403661","doi":"10.1109/l-ca.2008.13","title":"Multicore DIMM: an Energy Efficient Memory Module with Independently Controlled DRAMs","year":2008,"lang":"en","type":"article","venue":"IEEE Computer Architecture Letters","topic":"Parallel Computing and Optimization Techniques","field":"Computer Science","cited_by":85,"is_retracted":false,"has_abstract":true,"route_ca_aff":true,"route_ca_fund":false,"route_ca_venue":false,"route_about_ca":false,"ca_institutions":"Hewlett-Packard (Canada)","funders":"","keywords":"Computer science; Registered memory; Embedded system; Interleaved memory; Dram; Multi-core processor; Virtual memory; Memory management; Semiconductor memory; Memory bandwidth; Memory controller; Memory map; Computer hardware; Operating system","score_opus":0.009121959770687846,"score_gpt":0.204740974859805,"score_spread":0.19561901508911717,"validation_status":"score_only:v0-immature-baseline","prediction":{"id":"W2156403661","genre_codex":"empirical","genre_gemma":"empirical","domain_codex":null,"domain_gemma":null,"model_version":"metacan-v3-hybrid-931329e0061c","genre_candidate":"empirical","genre_consensus":"empirical","domain_candidate":null,"domain_consensus":null,"prediction_status":"machine_predicted_unvalidated","genre_scores_codex":[0.6774657,0.004449519,0.28629747,0.00042632077,0.00036008793,0.00028550503,0.001069577,0.008514064,0.021131633],"genre_scores_gemma":[0.8606194,0.00038670423,0.12917612,0.0002869475,0.00006229067,0.00012318423,0.0006742235,0.00010002332,0.008571104],"study_design_codex":"bench_or_experimental","study_design_gemma":"bench_or_experimental","domain_scores_codex":[0.9998535,0.000015237649,0.000010094087,0.00003827666,0.00004837207,0.00003443827],"domain_scores_gemma":[0.99988174,0.000011281187,0.00002124267,0.00004084429,0.000025524942,0.000019398825],"candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.00013926403,0.0002604088,0.00028464192,0.000292008,0.0002591496,0.00038813605,0.001955937,0.00023790346,0.0022457936],"category_scores_gemma":[0.0001707666,0.00016328026,0.0002117573,0.00032550286,0.00016963997,0.00062492787,0.000831745,0.00023712649,0.00041040324],"study_design_candidate":"bench_or_experimental","study_design_consensus":"bench_or_experimental","about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_system_candidate":false,"about_ca_system_consensus":false,"study_design_scores_codex":[0.0011824719,0.00048811815,0.008362298,0.00083749107,0.00017820216,0.0006030948,0.00017397819,0.018471843,0.5399698,0.011695056,0.021387989,0.39664966],"study_design_scores_gemma":[0.0003232403,0.0029173936,0.011122508,0.00005922513,0.00021783503,0.002065894,0.00011445812,0.28583574,0.5505963,0.0038415347,0.14277758,0.0001281886],"about_ca_topic_score_codex":0.00049172936,"about_ca_topic_score_gemma":0.001247107,"teacher_disagreement_score":0.0022457936,"about_ca_system_score_codex":0.0002932428,"about_ca_system_score_gemma":0.0003494103,"threshold_uncertainty_score":0.0075128675},"labels":[],"label_agreement":null},{"id":"W2441593292","doi":"10.1109/lca.2015.2435709","title":"Inter-Core Locality Aware Memory Scheduling","year":2015,"lang":"en","type":"article","venue":"IEEE Computer Architecture Letters","topic":"Parallel Computing and Optimization Techniques","field":"Computer Science","cited_by":24,"is_retracted":false,"has_abstract":true,"route_ca_aff":true,"route_ca_fund":false,"route_ca_venue":false,"route_about_ca":false,"ca_institutions":"University of British Columbia","funders":"","keywords":"Computer science; Locality; Parallel computing; Cache; Locality of reference; CPU cache; Operating system","score_opus":0.03353139430427328,"score_gpt":0.26647081695305,"score_spread":0.23293942264877676,"validation_status":"score_only:v0-immature-baseline","prediction":{"id":"W2441593292","genre_codex":"methods","genre_gemma":"empirical","domain_codex":null,"domain_gemma":null,"model_version":"metacan-v3-hybrid-931329e0061c","genre_candidate":"empirical","genre_consensus":null,"domain_candidate":null,"domain_consensus":null,"prediction_status":"machine_predicted_unvalidated","genre_scores_codex":[0.39203554,0.0033630894,0.5575574,0.00061172066,0.00030294617,0.00022127331,0.00034022442,0.007406651,0.03816115],"genre_scores_gemma":[0.9409128,0.00030253807,0.052061535,0.0001706324,0.00005326641,0.00006488945,0.0003067124,0.00031917813,0.005808338],"study_design_codex":"design_other","study_design_gemma":"simulation_or_modeling","domain_scores_codex":[0.99888533,0.00019928903,0.000058024794,0.00019418726,0.0003319829,0.00033118448],"domain_scores_gemma":[0.99853694,0.00029553747,0.00016054582,0.00042453213,0.00047617627,0.00010626206],"candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0005758436,0.0006565927,0.0005890044,0.00066296087,0.00085050904,0.0009066772,0.0022455673,0.0004029701,0.0030340222],"category_scores_gemma":[0.0017580799,0.00036742262,0.00039287383,0.0009723929,0.00036163226,0.0011795779,0.0011198497,0.00068233476,0.00065908174],"study_design_candidate":"simulation_or_modeling","study_design_consensus":null,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_system_candidate":false,"about_ca_system_consensus":false,"study_design_scores_codex":[0.001847112,0.0008913125,0.012794531,0.0004487551,0.00027487107,0.0004389016,0.00048078646,0.36149666,0.10145627,0.02772,0.022724688,0.46942613],"study_design_scores_gemma":[0.00005547326,0.00027713075,0.002621199,0.00001592215,0.00006500274,0.00016129045,0.000121871555,0.93112063,0.04855918,0.0076150554,0.009352196,0.000035057223],"about_ca_topic_score_codex":0.0031912222,"about_ca_topic_score_gemma":0.0110311555,"teacher_disagreement_score":0.0031912222,"about_ca_system_score_codex":0.0011176079,"about_ca_system_score_gemma":0.0019797338,"threshold_uncertainty_score":0.010149837},"labels":[],"label_agreement":null},{"id":"W2483966489","doi":"10.1109/lca.2016.2597140","title":"Stripes: Bit-Serial Deep Neural Network Computing","year":2016,"lang":"en","type":"article","venue":"IEEE Computer Architecture Letters","topic":"Advanced Neural Network Applications","field":"Computer Science","cited_by":62,"is_retracted":false,"has_abstract":true,"route_ca_aff":true,"route_ca_fund":false,"route_ca_venue":false,"route_about_ca":false,"ca_institutions":"University of Toronto","funders":"","keywords":"Computer science; Computation; Acceleration; Artificial neural network; Overhead (engineering); Representation (politics); Set (abstract data type); Computer engineering; Energy (signal processing); Algorithm; Deep neural networks; State (computer science); Power (physics); Hardware acceleration; Efficient energy use; Artificial intelligence; Parallel computing; Computer hardware; Statistics; Mathematics; Electrical engineering","score_opus":0.010094015552453076,"score_gpt":0.22624569193254623,"score_spread":0.21615167638009317,"validation_status":"score_only:v0-immature-baseline","prediction":{"id":"W2483966489","genre_codex":"methods","genre_gemma":"empirical","domain_codex":null,"domain_gemma":null,"model_version":"metacan-v3-hybrid-931329e0061c","genre_candidate":"empirical","genre_consensus":null,"domain_candidate":null,"domain_consensus":null,"prediction_status":"machine_predicted_unvalidated","genre_scores_codex":[0.19481778,0.0026936834,0.70633197,0.0012904359,0.0011838092,0.00032001873,0.0024563414,0.04659558,0.04431044],"genre_scores_gemma":[0.67544776,0.0010843895,0.28929338,0.0007073107,0.0001438183,0.00030125622,0.0042737937,0.00093699014,0.027811287],"study_design_codex":"design_other","study_design_gemma":"bench_or_experimental","domain_scores_codex":[0.9996973,0.00004223967,0.000022819519,0.000054338598,0.00013895592,0.00004445073],"domain_scores_gemma":[0.99949193,0.00012215806,0.000046703204,0.0001670523,0.0001330156,0.00003910715],"candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.00044001758,0.0006851635,0.0003536373,0.0005314967,0.00027156027,0.00074783055,0.0016752364,0.00030800048,0.013525601],"category_scores_gemma":[0.0012884653,0.00032426888,0.00033362146,0.0010541967,0.00036405123,0.0015281454,0.00087419106,0.0008322186,0.0022951467],"study_design_candidate":"bench_or_experimental","study_design_consensus":null,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_system_candidate":false,"about_ca_system_consensus":false,"study_design_scores_codex":[0.0023380765,0.00045919814,0.0045617046,0.0006634295,0.0002458417,0.00038872083,0.0001625046,0.10985545,0.07303731,0.035278525,0.11747783,0.65553135],"study_design_scores_gemma":[0.0002566907,0.000580762,0.0014434619,0.000065448476,0.000062030645,0.00020977714,0.00006512639,0.86626315,0.063491836,0.025800362,0.041708577,0.00005278836],"about_ca_topic_score_codex":0.0026147084,"about_ca_topic_score_gemma":0.0055117304,"teacher_disagreement_score":0.013525601,"about_ca_system_score_codex":0.0005966034,"about_ca_system_score_gemma":0.0008823785,"threshold_uncertainty_score":0.045247674},"labels":[],"label_agreement":null},{"id":"W2769715556","doi":"10.1109/lca.2017.2777834","title":"The EH Model: Analytical Exploration of Energy-Harvesting Architectures","year":2017,"lang":"en","type":"article","venue":"IEEE Computer Architecture Letters","topic":"Parallel Computing and Optimization Techniques","field":"Computer Science","cited_by":24,"is_retracted":false,"has_abstract":true,"route_ca_aff":true,"route_ca_fund":false,"route_ca_venue":false,"route_about_ca":false,"ca_institutions":"University of Toronto","funders":"","keywords":"Computer science; Energy harvesting; Computation; Focus (optics); Work (physics); Energy (signal processing); Distributed computing; Industrial engineering; Embedded system; Engineering","score_opus":0.030331696311428267,"score_gpt":0.27121694397506013,"score_spread":0.24088524766363187,"validation_status":"score_only:v0-immature-baseline","prediction":{"id":"W2769715556","genre_codex":"methods","genre_gemma":"empirical","domain_codex":null,"domain_gemma":null,"model_version":"metacan-v3-hybrid-931329e0061c","genre_candidate":"empirical","genre_consensus":null,"domain_candidate":null,"domain_consensus":null,"prediction_status":"machine_predicted_unvalidated","genre_scores_codex":[0.15423231,0.0033157847,0.7104531,0.0053052558,0.00023002569,0.0001483422,0.00042894162,0.0005900074,0.1252963],"genre_scores_gemma":[0.9530576,0.0012149321,0.023332214,0.00040109947,0.00009099056,0.00012034616,0.00008868582,0.00015128742,0.021542797],"study_design_codex":"simulation_or_modeling","study_design_gemma":"simulation_or_modeling","domain_scores_codex":[0.9997029,0.00008524993,0.000007863968,0.000033338056,0.00007920081,0.000091426075],"domain_scores_gemma":[0.99906737,0.0005357667,0.00008898065,0.000097771794,0.00013775693,0.00007235917],"candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.00079108815,0.0005662973,0.00060801447,0.0006162102,0.00054227514,0.0012192538,0.0017797446,0.0013334126,0.0073226364],"category_scores_gemma":[0.0035921207,0.0004239712,0.0005001361,0.0005920544,0.0012773199,0.0027053324,0.0012597614,0.001158489,0.0006479841],"study_design_candidate":"simulation_or_modeling","study_design_consensus":"simulation_or_modeling","about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_system_candidate":false,"about_ca_system_consensus":false,"study_design_scores_codex":[0.00005059033,0.000057403602,0.00053484744,0.000089344816,0.00001733861,0.00012755491,0.00012872685,0.773592,0.0019340267,0.21465458,0.002511575,0.006302022],"study_design_scores_gemma":[0.0000047981075,0.0000063523325,0.00006737167,0.000006408453,0.000002581428,0.000011660574,0.000023362118,0.96712875,0.00010857077,0.032030046,0.00060597825,0.0000041403077],"about_ca_topic_score_codex":0.0048685004,"about_ca_topic_score_gemma":0.0042573675,"teacher_disagreement_score":0.0073226364,"about_ca_system_score_codex":0.0012128361,"about_ca_system_score_gemma":0.0009963395,"threshold_uncertainty_score":0.024496675},"labels":[],"label_agreement":null},{"id":"W3041919703","doi":"10.1109/lca.2020.3008288","title":"MCsim: An Extensible DRAM Memory Controller Simulator","year":2020,"lang":"en","type":"article","venue":"IEEE Computer Architecture Letters","topic":"Parallel Computing and Optimization Techniques","field":"Computer Science","cited_by":18,"is_retracted":false,"has_abstract":true,"route_ca_aff":true,"route_ca_fund":true,"route_ca_venue":false,"route_about_ca":false,"ca_institutions":"McMaster University; University of Waterloo","funders":"Natural Sciences and Engineering Research Council of Canada; CMC Microsystems","keywords":"Computer science; Extensibility; Dram; Embedded system; Computer architecture simulator; Memory controller; CAS latency; Scheduling (production processes); Interface (matter); Computer architecture; Operating system; Computer hardware","score_opus":0.015918679296096194,"score_gpt":0.23536594872781405,"score_spread":0.21944726943171786,"validation_status":"score_only:v0-immature-baseline","prediction":{"id":"W3041919703","genre_codex":"methods","genre_gemma":"methods","domain_codex":null,"domain_gemma":null,"model_version":"metacan-v3-hybrid-931329e0061c","genre_candidate":"methods","genre_consensus":"methods","domain_candidate":null,"domain_consensus":null,"prediction_status":"machine_predicted_unvalidated","genre_scores_codex":[0.08900074,0.0010571218,0.8448024,0.00039300087,0.00034224542,0.0005442878,0.005230306,0.027267858,0.03136207],"genre_scores_gemma":[0.56860846,0.0011383116,0.40503585,0.00028728344,0.00007705672,0.0009003506,0.0059301592,0.00189181,0.016130714],"study_design_codex":"simulation_or_modeling","study_design_gemma":"simulation_or_modeling","domain_scores_codex":[0.9998572,0.00002383736,0.000011113761,0.000017814325,0.00006600935,0.000024034334],"domain_scores_gemma":[0.9997626,0.00007355872,0.00002488572,0.000053328946,0.00006562307,0.000019954025],"candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.00025513288,0.00051269657,0.00041046608,0.00045879287,0.00022052728,0.00040659093,0.0022958312,0.0006208728,0.005534519],"category_scores_gemma":[0.00097377383,0.00031613687,0.0004977598,0.00039208814,0.000213891,0.00053689675,0.00071135676,0.0007968514,0.0007453884],"study_design_candidate":"simulation_or_modeling","study_design_consensus":"simulation_or_modeling","about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_system_candidate":false,"about_ca_system_consensus":false,"study_design_scores_codex":[0.00015033547,0.00007337968,0.002192047,0.00023213132,0.000087113855,0.00020482742,0.000101125086,0.90928745,0.018309671,0.017356858,0.009616003,0.04238903],"study_design_scores_gemma":[0.000029620924,0.00003808015,0.00016743143,0.000008177323,0.000016942888,0.000043527358,0.000008812921,0.97695816,0.005772403,0.0014239281,0.015522371,0.000010523952],"about_ca_topic_score_codex":0.004102288,"about_ca_topic_score_gemma":0.004379988,"teacher_disagreement_score":0.005534519,"about_ca_system_score_codex":0.00035976252,"about_ca_system_score_gemma":0.0009421966,"threshold_uncertainty_score":0.018514872},"labels":[],"label_agreement":null},{"id":"W4385152117","doi":"10.1109/lca.2023.3297875","title":"The Mirage of Breaking MIRAGE: Analyzing the Modeling Pitfalls in Emerging “Attacks” on MIRAGE","year":2023,"lang":"en","type":"article","venue":"IEEE Computer Architecture Letters","topic":"Security and Verification in Computing","field":"Computer Science","cited_by":1,"is_retracted":false,"has_abstract":true,"route_ca_aff":true,"route_ca_fund":false,"route_ca_venue":false,"route_about_ca":false,"ca_institutions":"University of Toronto","funders":"","keywords":"Computer science; Set (abstract data type); Vulnerability (computing); Computer security; Initialization; Work (physics); Cache; Programming language; Parallel computing; Engineering","score_opus":0.01986649166833357,"score_gpt":0.264111562793635,"score_spread":0.24424507112530144,"validation_status":"score_only:v0-immature-baseline","prediction":{"id":"W4385152117","genre_codex":"methods","genre_gemma":"empirical","domain_codex":null,"domain_gemma":null,"model_version":"metacan-v3-hybrid-931329e0061c","genre_candidate":"empirical","genre_consensus":null,"domain_candidate":null,"domain_consensus":null,"prediction_status":"machine_predicted_unvalidated","genre_scores_codex":[0.17191319,0.0004801318,0.81279236,0.0029275396,0.00010717608,0.00012785528,0.00011906586,0.0012239432,0.010308773],"genre_scores_gemma":[0.85834163,0.00025190527,0.13849303,0.00048785683,0.000059018552,0.00012777718,0.000095337215,0.00038665356,0.0017567661],"study_design_codex":"theoretical_or_conceptual","study_design_gemma":"simulation_or_modeling","domain_scores_codex":[0.9942386,0.0026094995,0.00027104927,0.0006441089,0.0016806633,0.00055609655],"domain_scores_gemma":[0.95883095,0.025972927,0.0041375,0.008282943,0.0024273184,0.00034840946],"candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0058154836,0.000803691,0.00079540466,0.0011461633,0.0012355538,0.0024605468,0.0014684602,0.0019136054,0.0019540575],"category_scores_gemma":[0.044358827,0.00085565966,0.0012986895,0.0005938352,0.0032809412,0.0069717243,0.0030845893,0.0041756043,0.0003106816],"study_design_candidate":"simulation_or_modeling","study_design_consensus":null,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_system_candidate":false,"about_ca_system_consensus":false,"study_design_scores_codex":[0.0002975921,0.000118216136,0.016213048,0.000238851,0.00013109903,0.0010649646,0.0031571994,0.34196874,0.0057650255,0.5868427,0.002658432,0.041544106],"study_design_scores_gemma":[0.000024127678,0.00012314312,0.0011956086,0.00011641193,0.000058908332,0.00039206867,0.00042538322,0.8043904,0.0069644614,0.17723446,0.009026942,0.000048193706],"about_ca_topic_score_codex":0.0025226478,"about_ca_topic_score_gemma":0.002207017,"teacher_disagreement_score":0.0058154836,"about_ca_system_score_codex":0.0017043338,"about_ca_system_score_gemma":0.0015567087,"threshold_uncertainty_score":0.03075564},"labels":[],"label_agreement":null},{"id":"W4385757678","doi":"10.1109/lca.2023.3304613","title":"By-Software Branch Prediction in Loops","year":2023,"lang":"en","type":"article","venue":"IEEE Computer Architecture Letters","topic":"Parallel Computing and Optimization Techniques","field":"Computer Science","cited_by":2,"is_retracted":false,"has_abstract":true,"route_ca_aff":true,"route_ca_fund":false,"route_ca_venue":false,"route_about_ca":false,"ca_institutions":"Huawei Technologies (Canada)","funders":"","keywords":"Computer science; Branch predictor; Loop unrolling; Parallel computing; Spec#; Speedup; Overhead (engineering); Compiler; Software; Call graph; Instruction set; Theoretical computer science; Programming language","score_opus":0.008231002039466353,"score_gpt":0.22015270033856177,"score_spread":0.2119216982990954,"validation_status":"score_only:v0-immature-baseline","prediction":{"id":"W4385757678","genre_codex":"methods","genre_gemma":"empirical","domain_codex":null,"domain_gemma":null,"model_version":"metacan-v3-hybrid-931329e0061c","genre_candidate":"empirical","genre_consensus":null,"domain_candidate":null,"domain_consensus":null,"prediction_status":"machine_predicted_unvalidated","genre_scores_codex":[0.20760728,0.0008496006,0.7527831,0.0002549621,0.00010279349,0.00009606412,0.0005032718,0.03253579,0.0052671535],"genre_scores_gemma":[0.7825369,0.00031206213,0.21072242,0.00010194627,0.00005642026,0.00010168004,0.0009131061,0.0010097413,0.0042457143],"study_design_codex":"design_other","study_design_gemma":"simulation_or_modeling","domain_scores_codex":[0.99952185,0.0000914048,0.000028738412,0.00011006352,0.00017574754,0.00007218672],"domain_scores_gemma":[0.9986663,0.00044073132,0.00019538579,0.00036534495,0.00028533308,0.00004695694],"candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.00035362868,0.0008666422,0.0004573142,0.00078612985,0.00035178754,0.0007659033,0.000801598,0.00035774076,0.0029446462],"category_scores_gemma":[0.0019442589,0.00038822906,0.0004232593,0.0006949476,0.0003636036,0.0009445952,0.00054251426,0.0005550917,0.0010739962],"study_design_candidate":"simulation_or_modeling","study_design_consensus":null,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_system_candidate":false,"about_ca_system_consensus":false,"study_design_scores_codex":[0.00082606624,0.00018464225,0.019165764,0.00031635945,0.00008932932,0.00017926238,0.00017767728,0.21600887,0.08682159,0.0067883707,0.0074696727,0.6619724],"study_design_scores_gemma":[0.00002719685,0.0001638107,0.002134978,0.000023365199,0.000028710754,0.00007961098,0.000021349577,0.92509043,0.06268063,0.0054505086,0.0042787306,0.000020628211],"about_ca_topic_score_codex":0.004047247,"about_ca_topic_score_gemma":0.0063647884,"teacher_disagreement_score":0.004047247,"about_ca_system_score_codex":0.0005072731,"about_ca_system_score_gemma":0.0015616466,"threshold_uncertainty_score":0.0098508},"labels":[],"label_agreement":null},{"id":"W4392114198","doi":"10.1109/lca.2024.3365149","title":"Improving Energy-Efficiency of Capsule Networks on Modern GPUs","year":2024,"lang":"en","type":"article","venue":"IEEE Computer Architecture Letters","topic":"Caching and Content Delivery","field":"Computer Science","cited_by":2,"is_retracted":false,"has_abstract":true,"route_ca_aff":true,"route_ca_fund":false,"route_ca_venue":false,"route_about_ca":false,"ca_institutions":"Lakehead University","funders":"","keywords":"Computer science; Computer architecture; Efficient energy use; Parallel computing; Energy (signal processing); Embedded system; Electrical engineering; Engineering","score_opus":0.006455408577077102,"score_gpt":0.18835891221101583,"score_spread":0.18190350363393873,"validation_status":"score_only:v0-immature-baseline","prediction":{"id":"W4392114198","genre_codex":"empirical","genre_gemma":"empirical","domain_codex":null,"domain_gemma":null,"model_version":"metacan-v3-hybrid-931329e0061c","genre_candidate":"empirical","genre_consensus":"empirical","domain_candidate":null,"domain_consensus":null,"prediction_status":"machine_predicted_unvalidated","genre_scores_codex":[0.61163205,0.0052144406,0.32721132,0.0015233263,0.00051563914,0.00017879746,0.00075701694,0.016514204,0.036453247],"genre_scores_gemma":[0.91677153,0.00064216624,0.07568448,0.000286288,0.000034375156,0.00006910248,0.0008509637,0.0004107938,0.0052501406],"study_design_codex":"design_other","study_design_gemma":"simulation_or_modeling","domain_scores_codex":[0.99951994,0.00009221075,0.00003150478,0.00007324787,0.00015814797,0.00012501555],"domain_scores_gemma":[0.9993309,0.00017441223,0.000049984523,0.00020750538,0.00018368289,0.00005348822],"candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0005538284,0.0010049097,0.0005705443,0.00066452834,0.00041053104,0.0010768895,0.0019647456,0.00040363063,0.0038878287],"category_scores_gemma":[0.0021478513,0.00023081042,0.00033665018,0.0011537848,0.00041016936,0.0025303506,0.0010199847,0.0007271164,0.00095849263],"study_design_candidate":"simulation_or_modeling","study_design_consensus":null,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_system_candidate":false,"about_ca_system_consensus":false,"study_design_scores_codex":[0.0021234527,0.00051462,0.008128852,0.00066304946,0.00023773241,0.00067867484,0.00026950857,0.2654885,0.08577271,0.022135966,0.06328087,0.55070615],"study_design_scores_gemma":[0.00009124651,0.00030291927,0.0013904332,0.000037097478,0.00006669177,0.00015625967,0.00009944876,0.94289196,0.034925133,0.005891891,0.014121261,0.000025756535],"about_ca_topic_score_codex":0.0061137495,"about_ca_topic_score_gemma":0.010884499,"teacher_disagreement_score":0.0061137495,"about_ca_system_score_codex":0.0012448292,"about_ca_system_score_gemma":0.0011110917,"threshold_uncertainty_score":0.013006091},"labels":[],"label_agreement":null},{"id":"W4401508180","doi":"10.1109/lca.2024.3441941","title":"Octopus: A Cycle-Accurate Cache System Simulator","year":2024,"lang":"en","type":"article","venue":"IEEE Computer Architecture Letters","topic":"Modular Robots and Swarm Intelligence","field":"Engineering","cited_by":2,"is_retracted":false,"has_abstract":true,"route_ca_aff":true,"route_ca_fund":false,"route_ca_venue":false,"route_about_ca":false,"ca_institutions":"McMaster University","funders":"","keywords":"Computer science; octopus (software); Cache; Computer architecture; Parallel computing; Embedded system; Operating system; Programming language","score_opus":0.007108834151895123,"score_gpt":0.20289161474050618,"score_spread":0.19578278058861107,"validation_status":"score_only:v0-immature-baseline","prediction":{"id":"W4401508180","genre_codex":"methods","genre_gemma":"empirical","domain_codex":null,"domain_gemma":null,"model_version":"metacan-v3-hybrid-931329e0061c","genre_candidate":"empirical","genre_consensus":null,"domain_candidate":null,"domain_consensus":null,"prediction_status":"machine_predicted_unvalidated","genre_scores_codex":[0.1631656,0.0012674751,0.7294077,0.0005489219,0.00034738934,0.00059994083,0.008185663,0.022015315,0.07446202],"genre_scores_gemma":[0.7295058,0.0009218434,0.23604876,0.0002834971,0.00004954579,0.0009599959,0.007897434,0.0024000606,0.02193308],"study_design_codex":"simulation_or_modeling","study_design_gemma":"simulation_or_modeling","domain_scores_codex":[0.9998387,0.000033446155,0.000010362529,0.000020110636,0.00007079106,0.000026522104],"domain_scores_gemma":[0.9996768,0.000116825446,0.000030495334,0.00005423989,0.000091606875,0.00003001937],"candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.00023058036,0.00049990707,0.00044415123,0.00046941906,0.00039113054,0.00064060325,0.0015823487,0.00075926055,0.006448402],"category_scores_gemma":[0.0011553025,0.00038778855,0.00045060346,0.0005594704,0.00025831704,0.0008631603,0.0006459093,0.0007652719,0.00072514114],"study_design_candidate":"simulation_or_modeling","study_design_consensus":"simulation_or_modeling","about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_system_candidate":false,"about_ca_system_consensus":false,"study_design_scores_codex":[0.00009473184,0.000051128467,0.0014222054,0.00013450647,0.000049938266,0.00007860101,0.00007920564,0.95432705,0.005303591,0.012040708,0.008517264,0.017901072],"study_design_scores_gemma":[0.000020671567,0.000028994016,0.00014834356,0.000007674557,0.000008814394,0.000022081751,0.000010149602,0.987311,0.0019364153,0.0015378003,0.00895839,0.00000959683],"about_ca_topic_score_codex":0.009722606,"about_ca_topic_score_gemma":0.010988481,"teacher_disagreement_score":0.009722606,"about_ca_system_score_codex":0.00070596713,"about_ca_system_score_gemma":0.001632757,"threshold_uncertainty_score":0.021571994},"labels":[],"label_agreement":null},{"id":"W4408164120","doi":"10.1109/lca.2025.3547262","title":"DPWatch: A Framework for Hardware-Based Differential Privacy Guarantees","year":2025,"lang":"en","type":"article","venue":"IEEE Computer Architecture Letters","topic":"Security and Verification in Computing","field":"Computer Science","cited_by":0,"is_retracted":false,"has_abstract":true,"route_ca_aff":true,"route_ca_fund":false,"route_ca_venue":false,"route_about_ca":false,"ca_institutions":"University of Toronto","funders":"","keywords":"Computer science; Differential privacy; Computer security; Embedded system; Computer hardware; Computer network; Computer architecture; Data mining","score_opus":0.0166352827419804,"score_gpt":0.26978453681913733,"score_spread":0.25314925407715694,"validation_status":"score_only:v0-immature-baseline","prediction":{"id":"W4408164120","genre_codex":"methods","genre_gemma":"empirical","domain_codex":null,"domain_gemma":null,"model_version":"metacan-v3-hybrid-931329e0061c","genre_candidate":"empirical","genre_consensus":null,"domain_candidate":null,"domain_consensus":null,"prediction_status":"machine_predicted_unvalidated","genre_scores_codex":[0.0024585533,0.00014823947,0.99154013,0.0002622739,0.000046383724,0.00006899037,0.00008844197,0.0042873845,0.0010995618],"genre_scores_gemma":[0.38453442,0.00048449228,0.60654664,0.00075988285,0.00020353164,0.0005535252,0.00054464693,0.0009108491,0.0054619703],"study_design_codex":"theoretical_or_conceptual","study_design_gemma":"simulation_or_modeling","domain_scores_codex":[0.9920031,0.0021134773,0.00059293216,0.0011160593,0.0034045544,0.0007698231],"domain_scores_gemma":[0.99140656,0.0030680122,0.00064715237,0.0038311789,0.00076504704,0.00028206926],"candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0063798004,0.0012468464,0.001321132,0.0011621879,0.0012661669,0.0038313405,0.0053142766,0.0021662053,0.0056432784],"category_scores_gemma":[0.016664008,0.001200057,0.0014465352,0.0013833842,0.0031383275,0.007801979,0.00717995,0.0050473153,0.0014526697],"study_design_candidate":"simulation_or_modeling","study_design_consensus":null,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_system_candidate":false,"about_ca_system_consensus":false,"study_design_scores_codex":[0.0010234702,0.00027209622,0.0020569225,0.00039875356,0.00021875884,0.00042309123,0.00037283156,0.29052138,0.013140569,0.4226096,0.021219527,0.24774286],"study_design_scores_gemma":[0.00008606151,0.00014588617,0.00016928789,0.000036090667,0.00003125636,0.00015158844,0.000033157972,0.8242759,0.012683155,0.14832371,0.014013436,0.000050469633],"about_ca_topic_score_codex":0.0019996492,"about_ca_topic_score_gemma":0.002078462,"teacher_disagreement_score":0.0063798004,"about_ca_system_score_codex":0.001933751,"about_ca_system_score_gemma":0.0034737068,"threshold_uncertainty_score":0.033739984},"labels":[],"label_agreement":null},{"id":"W4415968362","doi":"10.1109/lca.2025.3630094","title":"Disaggregated Speculative Decoding for Carbon-Efficient LLM Serving","year":2025,"lang":"","type":"article","venue":"IEEE Computer Architecture Letters","topic":"Advanced Neural Network Applications","field":"Computer Science","cited_by":1,"is_retracted":false,"has_abstract":true,"route_ca_aff":true,"route_ca_fund":false,"route_ca_venue":false,"route_about_ca":false,"ca_institutions":"University of Waterloo","funders":"","keywords":"Decoding methods; Security token; Cache; Workload; Overhead (engineering); Latency (audio); Sequential decoding; Decoupling (probability)","score_opus":0.013340716557823408,"score_gpt":0.26462515500385364,"score_spread":0.2512844384460302,"validation_status":"score_only:v0-immature-baseline","prediction":{"id":"W4415968362","genre_codex":"methods","genre_gemma":"empirical","domain_codex":null,"domain_gemma":null,"model_version":"metacan-v3-hybrid-931329e0061c","genre_candidate":"empirical","genre_consensus":null,"domain_candidate":null,"domain_consensus":null,"prediction_status":"machine_predicted_unvalidated","genre_scores_codex":[0.23039462,0.0020013847,0.7121049,0.001610632,0.00038763147,0.00019305228,0.0014906832,0.037484977,0.014332148],"genre_scores_gemma":[0.80060714,0.0003441078,0.1891828,0.00062239316,0.00006769568,0.00014536617,0.0019197973,0.00227628,0.0048345216],"study_design_codex":"simulation_or_modeling","study_design_gemma":"simulation_or_modeling","domain_scores_codex":[0.99919885,0.00019672602,0.000050057104,0.00014592372,0.00024027891,0.00016818814],"domain_scores_gemma":[0.9984806,0.0005870783,0.00006840879,0.0005096513,0.0002599048,0.00009426343],"candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0007375073,0.0012614105,0.00084096147,0.0004870872,0.00077576196,0.0017132196,0.0020374283,0.0009096006,0.0034132104],"category_scores_gemma":[0.0045165922,0.00045674958,0.00060994725,0.00075132964,0.0008887046,0.0028384442,0.0024843025,0.00166623,0.0015832281],"study_design_candidate":"simulation_or_modeling","study_design_consensus":"simulation_or_modeling","about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_system_candidate":false,"about_ca_system_consensus":false,"study_design_scores_codex":[0.0010014077,0.00046391189,0.009387128,0.00037750532,0.00014383475,0.0007477215,0.0010630331,0.53569716,0.065434396,0.031101199,0.039069492,0.31551325],"study_design_scores_gemma":[0.000022379842,0.0000501338,0.00014140787,0.0000071523104,0.0000129032915,0.00004392819,0.000084832056,0.9791686,0.007638505,0.009165198,0.0036495125,0.000015367086],"about_ca_topic_score_codex":0.009407122,"about_ca_topic_score_gemma":0.02451561,"teacher_disagreement_score":0.009407122,"about_ca_system_score_codex":0.0012506733,"about_ca_system_score_gemma":0.003178133,"threshold_uncertainty_score":0.018704772},"labels":[],"label_agreement":null},{"id":"W4416513626","doi":"10.1109/lca.2025.3630669","title":"A Performance Model for Disintegrated Manycores","year":2025,"lang":"","type":"article","venue":"IEEE Computer Architecture Letters","topic":"Interconnection Networks and Systems","field":"Computer Science","cited_by":0,"is_retracted":false,"has_abstract":true,"route_ca_aff":true,"route_ca_fund":true,"route_ca_venue":false,"route_about_ca":false,"ca_institutions":"University of Toronto","funders":"Natural Sciences and Engineering Research Council of Canada; Canada Research Chairs","keywords":"Interconnection; Focus (optics); Yield (engineering); Data modeling; Context model; Integrated circuit packaging; Work (physics); Key (lock); Semiconductor device modeling","score_opus":0.013554097472716624,"score_gpt":0.23434494159957,"score_spread":0.22079084412685338,"validation_status":"score_only:v0-immature-baseline","prediction":{"id":"W4416513626","genre_codex":"methods","genre_gemma":"empirical","domain_codex":null,"domain_gemma":null,"model_version":"metacan-v3-hybrid-931329e0061c","genre_candidate":"empirical","genre_consensus":null,"domain_candidate":null,"domain_consensus":null,"prediction_status":"machine_predicted_unvalidated","genre_scores_codex":[0.15963838,0.0025464178,0.74226475,0.002763757,0.00023419817,0.00024496307,0.0011472986,0.002294738,0.088865496],"genre_scores_gemma":[0.91921157,0.0012861823,0.032812264,0.000634941,0.00010669131,0.0003556021,0.0005992731,0.0006075248,0.044385966],"study_design_codex":"simulation_or_modeling","study_design_gemma":"simulation_or_modeling","domain_scores_codex":[0.9991918,0.00013238528,0.000029059227,0.00013248985,0.00029756676,0.00021673519],"domain_scores_gemma":[0.99883837,0.0003637168,0.0001287826,0.00014516027,0.000444068,0.00007990347],"candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0008322991,0.0011643964,0.0007404502,0.00094199565,0.0007220274,0.0013564439,0.0029333837,0.001865442,0.009165001],"category_scores_gemma":[0.0028751434,0.000534859,0.00073157623,0.00074985117,0.0009822779,0.0030678923,0.0011032966,0.0016000529,0.0027246093],"study_design_candidate":"simulation_or_modeling","study_design_consensus":"simulation_or_modeling","about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_system_candidate":false,"about_ca_system_consensus":false,"study_design_scores_codex":[0.000057493096,0.000035228717,0.00031609205,0.000052891126,0.00001442646,0.00012261767,0.00007813135,0.93345094,0.0032298616,0.05505644,0.0022791033,0.0053068143],"study_design_scores_gemma":[0.0000052105765,0.000019767209,0.0000849487,0.000006075072,0.0000049261753,0.00003012197,0.000008834931,0.99235207,0.00037290232,0.0059567215,0.0011533702,0.0000051680654],"about_ca_topic_score_codex":0.010880779,"about_ca_topic_score_gemma":0.0048538116,"teacher_disagreement_score":0.010880779,"about_ca_system_score_codex":0.0024024313,"about_ca_system_score_gemma":0.0012832211,"threshold_uncertainty_score":0.030659914},"labels":[],"label_agreement":null},{"id":"W4416707459","doi":"10.1109/lca.2025.3637718","title":"Fusing Adds and Shifts for Efficient Dot Products","year":2025,"lang":"en","type":"article","venue":"IEEE Computer Architecture Letters","topic":"Numerical Methods and Algorithms","field":"Computer Science","cited_by":0,"is_retracted":false,"has_abstract":true,"route_ca_aff":true,"route_ca_fund":true,"route_ca_venue":false,"route_about_ca":false,"ca_institutions":"University of Toronto","funders":"Natural Sciences and Engineering Research Council of Canada","keywords":"Adder; Dot product; Multiplier (economics); Multiplication (music); Tree (set theory); Product (mathematics)","score_opus":0.011399782714914467,"score_gpt":0.2591586618781034,"score_spread":0.24775887916318892,"validation_status":"score_only:v0-immature-baseline","prediction":{"id":"W4416707459","genre_codex":"methods","genre_gemma":"empirical","domain_codex":null,"domain_gemma":null,"model_version":"metacan-v3-hybrid-931329e0061c","genre_candidate":"empirical","genre_consensus":null,"domain_candidate":null,"domain_consensus":null,"prediction_status":"machine_predicted_unvalidated","genre_scores_codex":[0.108130656,0.0010306921,0.86309016,0.00043419693,0.0004993674,0.00027716506,0.0002805384,0.0078643495,0.01839289],"genre_scores_gemma":[0.33808964,0.0005276745,0.6455953,0.0003806508,0.00023773698,0.0001901176,0.0005069604,0.0004054152,0.014066409],"study_design_codex":"design_other","study_design_gemma":"simulation_or_modeling","domain_scores_codex":[0.99927133,0.00006561973,0.000100614845,0.00015062191,0.0003038859,0.00010794788],"domain_scores_gemma":[0.99920434,0.00019848441,0.000090634945,0.00023895438,0.0002253606,0.000042210508],"candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.00042626858,0.0011384414,0.0007467655,0.0012592826,0.00090092985,0.0011234484,0.0010986641,0.00057318236,0.014416781],"category_scores_gemma":[0.0017971495,0.00054440834,0.0005379738,0.0012352638,0.00052316696,0.0022684128,0.0012339808,0.00064624916,0.0044463635],"study_design_candidate":"simulation_or_modeling","study_design_consensus":null,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_system_candidate":false,"about_ca_system_consensus":false,"study_design_scores_codex":[0.0007024721,0.00021021834,0.0008186003,0.0003432887,0.00006378036,0.00049832545,0.0002605438,0.019067602,0.11912587,0.061434776,0.010039176,0.7874353],"study_design_scores_gemma":[0.00027180088,0.001800015,0.0010819192,0.00013971096,0.00021140295,0.0018965345,0.0002618849,0.2501518,0.46528178,0.12555507,0.15317748,0.00017062933],"about_ca_topic_score_codex":0.0008241181,"about_ca_topic_score_gemma":0.0026955993,"teacher_disagreement_score":0.014416781,"about_ca_system_score_codex":0.0005124552,"about_ca_system_score_gemma":0.0011748346,"threshold_uncertainty_score":0.04822892},"labels":[],"label_agreement":null},{"id":"W4416749786","doi":"10.1109/lca.2025.3638260","title":"Another Mirage of Breaking MIRAGE: Debunking Occupancy-Based Side-Channel Attacks on Fully Associative Randomized Caches","year":2025,"lang":"","type":"article","venue":"IEEE Computer Architecture Letters","topic":"Security and Verification in Computing","field":"Computer Science","cited_by":0,"is_retracted":false,"has_abstract":true,"route_ca_aff":true,"route_ca_fund":false,"route_ca_venue":false,"route_about_ca":false,"ca_institutions":"University of Toronto","funders":"","keywords":"Cache; Randomized algorithm; Encryption; Timing attack; Cache algorithms; CPU cache","score_opus":0.01681514997980252,"score_gpt":0.26429327359365,"score_spread":0.2474781236138475,"validation_status":"score_only:v0-immature-baseline","prediction":{"id":"W4416749786","genre_codex":"methods","genre_gemma":"empirical","domain_codex":null,"domain_gemma":null,"model_version":"metacan-v3-hybrid-931329e0061c","genre_candidate":"empirical","genre_consensus":null,"domain_candidate":null,"domain_consensus":null,"prediction_status":"machine_predicted_unvalidated","genre_scores_codex":[0.39210218,0.0007403046,0.59855324,0.0011124373,0.00012273867,0.00011150156,0.00012819159,0.0028471702,0.0042821765],"genre_scores_gemma":[0.9687146,0.0001121724,0.029904418,0.00024943321,0.000024357414,0.00004390627,0.000028420107,0.00007937725,0.0008433426],"study_design_codex":"simulation_or_modeling","study_design_gemma":"bench_or_experimental","domain_scores_codex":[0.99479926,0.0024430398,0.0003143489,0.00045792406,0.0014526,0.00053281203],"domain_scores_gemma":[0.98043907,0.0073459563,0.0019875504,0.008963493,0.0010753222,0.00018868092],"candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.003393921,0.000590624,0.00077762903,0.00058345695,0.000622606,0.0013027205,0.0012632627,0.0011635204,0.0013085565],"category_scores_gemma":[0.017717816,0.0005241663,0.0008510031,0.00051235507,0.0019810928,0.0046721976,0.0018478349,0.0016843227,0.0003368762],"study_design_candidate":"bench_or_experimental","study_design_consensus":null,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_system_candidate":false,"about_ca_system_consensus":false,"study_design_scores_codex":[0.0017601503,0.00033508762,0.0122474525,0.000335907,0.00042742823,0.000657102,0.0009241224,0.5239976,0.0731404,0.27237734,0.0045369575,0.10926049],"study_design_scores_gemma":[0.000068173926,0.0005686931,0.0005463063,0.000053627984,0.00008318177,0.00037041123,0.0000801049,0.88335776,0.06605648,0.045419358,0.0033325981,0.000063287334],"about_ca_topic_score_codex":0.0005659916,"about_ca_topic_score_gemma":0.0006778351,"teacher_disagreement_score":0.003393921,"about_ca_system_score_codex":0.0010630408,"about_ca_system_score_gemma":0.0010399865,"threshold_uncertainty_score":0.017948985},"labels":[],"label_agreement":null}]}