{"meta":{"query_hash":"aea6406e0871","filters":{"venue":"International Symposium on Low Power Electronics and Design"},"cohort_total":3,"direct_labels_cover":0,"predictions_cover":3,"exported":3,"export_cap":100000,"truncated":false,"label_status":"direct model label, unvalidated","prediction_status":"machine_predicted_unvalidated (Codex and Gemma teacher distillation)","score_status":"score_only:v0-immature-baseline","snapshot":{"source":"OpenAlex, pinned release, all 482 partitions","release":"2026-06-24","frame_built":"2026-07-12"},"permalink":"https://metacan.xera.ac/q/aea6406e0871","api":"https://metacan.xera.ac/api/v1/cohort?venue=International+Symposium+on+Low+Power+Electronics+and+Design"},"results":[{"id":"W2125514963","doi":"10.5555/2016802.2016844","title":"Design and analysis of metastable-hardened flip-flops in sub-threshold region","year":2011,"lang":"en","type":"article","venue":"International Symposium on Low Power Electronics and Design","topic":"Low-power high-performance VLSI design","field":"Engineering","cited_by":12,"is_retracted":false,"has_abstract":true,"route_ca_aff":true,"route_ca_fund":false,"route_ca_venue":false,"route_about_ca":false,"ca_institutions":"University of Waterloo","funders":"","keywords":"Metastability; FLOPS; Spice; Transconductance; Flip-flop; Inverter; Electronic engineering; Threshold voltage; Asynchronous communication; Power (physics); Reduction (mathematics); Transistor; Computer science; Voltage; CMOS; Topology (electrical circuits); Electrical engineering; Engineering; Physics; Mathematics; Parallel computing; Telecommunications","score_opus":0.014831967875704,"score_gpt":0.2059437841799641,"score_spread":0.19111181630426008,"validation_status":"score_only:v0-immature-baseline","prediction":{"id":"W2125514963","genre_codex":"empirical","genre_gemma":"empirical","domain_codex":null,"domain_gemma":null,"model_version":"codex-gemma-dda1882f352a","genre_candidate":"empirical","genre_consensus":"empirical","domain_candidate":null,"domain_consensus":null,"prediction_status":"machine_predicted_unvalidated","genre_scores_codex":[0.6169893,0.0026473713,0.37503695,0.00011998892,0.0004753871,0.00069980137,0.000016749418,0.000167837,0.0038465858],"genre_scores_gemma":[0.99478215,0.0024939876,0.0024738126,0.00006541927,0.000017392254,0.00004623954,0.000015578167,0.000044119522,0.00006127414],"study_design_codex":"simulation_or_modeling","study_design_gemma":"simulation_or_modeling","domain_scores_codex":[0.99835795,0.00007295206,0.0004561102,0.00037623712,0.000331428,0.00040531709],"domain_scores_gemma":[0.9993106,0.00013957603,0.00009640316,0.00025942823,0.00009805104,0.00009590558],"candidate_categories":["metaepi_narrow"],"consensus_categories":[],"category_scores_codex":[0.00055646966,0.0002870088,0.0004151881,0.0007075595,0.00003948717,0.000054567507,0.0002662063,0.0001315862,0.000052340452],"category_scores_gemma":[0.000012645376,0.00028075042,0.00008352186,0.0005797999,0.00005819836,0.00029362564,0.000035346635,0.00023683587,0.000007731102],"study_design_candidate":"simulation_or_modeling","study_design_consensus":"simulation_or_modeling","about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_system_candidate":false,"about_ca_system_consensus":false,"study_design_scores_codex":[0.002875722,0.00089225784,0.00972584,0.00011182471,0.0072576106,0.00019913231,0.004935783,0.6879541,0.2598361,0.019907987,0.0025166222,0.0037869574],"study_design_scores_gemma":[0.002020188,0.0010965582,0.006503117,0.00011461274,0.0005303913,0.000035296584,0.000034343164,0.63626856,0.3502458,0.0013636743,0.00092099595,0.00086644985],"about_ca_topic_score_codex":0.000018302802,"about_ca_topic_score_gemma":0.000011084061,"teacher_disagreement_score":0.37779284,"about_ca_system_score_codex":0.00017771899,"about_ca_system_score_gemma":0.000044002554,"threshold_uncertainty_score":0.9999645},"labels":[],"label_agreement":null},{"id":"W2128701724","doi":"10.5555/2016802.2016811","title":"FPGA glitch power analysis and reduction","year":2011,"lang":"en","type":"article","venue":"International Symposium on Low Power Electronics and Design","topic":"VLSI and FPGA Design Techniques","field":"Engineering","cited_by":20,"is_retracted":false,"has_abstract":true,"route_ca_aff":true,"route_ca_fund":false,"route_ca_venue":false,"route_about_ca":false,"ca_institutions":"University of Toronto","funders":"","keywords":"Glitch; Field-programmable gate array; Power analysis; Dynamic demand; Overhead (engineering); Reduction (mathematics); Computer science; Power (physics); Routing (electronic design automation); Embedded system; Algorithm; Mathematics; Cryptography; Telecommunications; Physics","score_opus":0.008595959861145907,"score_gpt":0.20981841352481623,"score_spread":0.2012224536636703,"validation_status":"score_only:v0-immature-baseline","prediction":{"id":"W2128701724","genre_codex":"methods","genre_gemma":"empirical","domain_codex":null,"domain_gemma":null,"model_version":"codex-gemma-dda1882f352a","genre_candidate":"empirical","genre_consensus":null,"domain_candidate":null,"domain_consensus":null,"prediction_status":"machine_predicted_unvalidated","genre_scores_codex":[0.2843933,0.0021853412,0.65055287,0.00039765006,0.0009178369,0.00060843234,0.000025936699,0.0009685455,0.059950087],"genre_scores_gemma":[0.9970212,0.00093168695,0.0017143405,0.000063431435,0.00003421698,0.000027457629,0.00000801381,0.000026501282,0.00017316909],"study_design_codex":"bench_or_experimental","study_design_gemma":"bench_or_experimental","domain_scores_codex":[0.9991025,0.000026787344,0.00019785155,0.0002590599,0.00017995032,0.00023387861],"domain_scores_gemma":[0.9996389,0.000028465804,0.000036920974,0.00015411379,0.000063725274,0.000077832294],"candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.00019945431,0.00017749009,0.00016534183,0.00022974974,0.000050898896,0.00006954634,0.00012843843,0.00010540435,0.00014417115],"category_scores_gemma":[0.000005839009,0.00017214108,0.00006649231,0.00019210813,0.000034345958,0.00016131594,0.000018994258,0.00017121035,0.000009695562],"study_design_candidate":"bench_or_experimental","study_design_consensus":"bench_or_experimental","about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_system_candidate":false,"about_ca_system_consensus":false,"study_design_scores_codex":[0.0013625011,0.0011425962,0.0035912944,0.000085759406,0.009747904,0.000119007724,0.0092598535,0.0057537444,0.7468795,0.16620445,0.014568738,0.04128462],"study_design_scores_gemma":[0.0014231075,0.0024590634,0.008385971,0.00008856387,0.00060396205,0.00021408059,0.00014070737,0.04625448,0.8976183,0.025817825,0.015227169,0.0017668041],"about_ca_topic_score_codex":0.000016529957,"about_ca_topic_score_gemma":0.0000021958786,"teacher_disagreement_score":0.7126279,"about_ca_system_score_codex":0.000092634,"about_ca_system_score_gemma":0.000012509453,"threshold_uncertainty_score":0.70197093},"labels":[],"label_agreement":null},{"id":"W3138911302","doi":"10.1145/3244104","title":"Session details: Leakage estimation","year":2003,"lang":"en","type":"article","venue":"International Symposium on Low Power Electronics and Design","topic":"Network Security and Intrusion Detection","field":"Computer Science","cited_by":0,"is_retracted":false,"has_abstract":false,"route_ca_aff":true,"route_ca_fund":false,"route_ca_venue":false,"route_about_ca":false,"ca_institutions":"University of Toronto","funders":"","keywords":"Session (web analytics); Computer science; Leakage (economics); Reliability engineering; Engineering; World Wide Web","score_opus":0.00876204624194943,"score_gpt":0.23412273206060355,"score_spread":0.22536068581865412,"validation_status":"score_only:v0-immature-baseline","prediction":{"id":"W3138911302","genre_codex":"methods","genre_gemma":"empirical","domain_codex":null,"domain_gemma":null,"model_version":"codex-gemma-dda1882f352a","genre_candidate":"empirical","genre_consensus":null,"domain_candidate":null,"domain_consensus":null,"prediction_status":"machine_predicted_unvalidated","genre_scores_codex":[0.015470908,0.00027476336,0.9739082,0.0012031839,0.0008974863,0.0001759321,7.6665503e-7,0.00011619389,0.007952593],"genre_scores_gemma":[0.98966295,0.00031781563,0.0090024425,0.00068010896,0.000039953917,0.000018864399,0.0000029239736,0.000010855121,0.00026406907],"study_design_codex":"theoretical_or_conceptual","study_design_gemma":"simulation_or_modeling","domain_scores_codex":[0.9986957,0.00012752456,0.00020760785,0.00036933753,0.0003464862,0.00025337643],"domain_scores_gemma":[0.9993917,0.00012170769,0.00009445396,0.00022332063,0.00009018515,0.00007866951],"candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0004376972,0.00014854145,0.000105050145,0.00009926484,0.00019629093,0.00027545585,0.0003119887,0.00008824071,0.00006203582],"category_scores_gemma":[0.000048041526,0.0001368814,0.000047226815,0.00017232056,0.00002226302,0.00051752385,0.00004499752,0.00020602638,0.000059192545],"study_design_candidate":"theoretical_or_conceptual","study_design_consensus":null,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_system_candidate":false,"about_ca_system_consensus":false,"study_design_scores_codex":[0.000085692714,0.00023912362,0.000030368257,0.000005939676,0.000047995083,0.00001393816,0.00039005105,0.011525867,0.01595082,0.9424663,0.0020011142,0.027242767],"study_design_scores_gemma":[0.0010718986,0.0012791996,0.00014449055,0.00008712689,0.000010364195,0.00015150545,0.000012764107,0.7253778,0.11814446,0.07617655,0.07700478,0.0005390758],"about_ca_topic_score_codex":0.0000035840328,"about_ca_topic_score_gemma":0.0000017560291,"teacher_disagreement_score":0.9741921,"about_ca_system_score_codex":0.000120741344,"about_ca_system_score_gemma":0.00006155819,"threshold_uncertainty_score":0.5581862},"labels":[],"label_agreement":null}]}