{"meta":{"query_hash":"cf0a2144a34f","filters":{"venue":"Modeling of systems and processes"},"cohort_total":5,"direct_labels_cover":0,"predictions_cover":5,"exported":5,"export_cap":100000,"truncated":false,"label_status":"direct model label, unvalidated","prediction_status":"machine_predicted_unvalidated (Codex and Gemma teacher distillation)","score_status":"score_only:v0-immature-baseline","snapshot":{"source":"OpenAlex, pinned release, all 482 partitions","release":"2026-06-24","frame_built":"2026-07-12"},"permalink":"https://metacan.xera.ac/q/cf0a2144a34f","api":"https://metacan.xera.ac/api/v1/cohort?venue=Modeling+of+systems+and+processes"},"results":[{"id":"W4380610092","doi":"10.12737/2219-0767-2023-16-2-93-100","title":"Verilog-A model of the impurity freeze-out in LDD regions at cryogenic temperatures","year":2023,"lang":"en","type":"article","venue":"Modeling of systems and processes","topic":"Advancements in Semiconductor Devices and Circuit Design","field":"Engineering","cited_by":0,"is_retracted":false,"has_abstract":true,"route_ca_aff":true,"route_ca_fund":false,"route_ca_venue":false,"route_about_ca":false,"ca_institutions":"Mitel (Canada)","funders":"","keywords":"Transconductance; Transistor; CMOS; Voltage; Materials science; Threshold voltage; Scalability; Optoelectronics; Electronic engineering; Electrical engineering; Computer science; Engineering","score_opus":0.047660886552711605,"score_gpt":0.2478000312167696,"score_spread":0.200139144664058,"validation_status":"score_only:v0-immature-baseline","prediction":{"id":"W4380610092","genre_codex":"methods","genre_gemma":"methods","domain_codex":null,"domain_gemma":null,"model_version":"metacan-v3-hybrid-931329e0061c","genre_candidate":"methods","genre_consensus":"methods","domain_candidate":null,"domain_consensus":null,"prediction_status":"machine_predicted_unvalidated","genre_scores_codex":[0.073151104,0.0006934273,0.8675857,0.00085722073,0.00028665527,0.00043443055,0.0066546868,0.016037015,0.034299754],"genre_scores_gemma":[0.83753455,0.0008198344,0.13202201,0.0005452287,0.00006816669,0.001147565,0.0040647383,0.0010841493,0.022713777],"study_design_codex":"simulation_or_modeling","study_design_gemma":"simulation_or_modeling","domain_scores_codex":[0.99951863,0.000115113886,0.000032091142,0.00007132045,0.00018905259,0.0000737621],"domain_scores_gemma":[0.9988814,0.00055905094,0.00008389408,0.00018882073,0.00026641658,0.000020364616],"candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0006234632,0.00070099096,0.0005186254,0.000458243,0.00051874015,0.0011350672,0.0022106373,0.0010686335,0.013045351],"category_scores_gemma":[0.0019247863,0.00048481487,0.0007071081,0.00030046247,0.0005882538,0.0013338685,0.000410642,0.0014036213,0.0025938805],"study_design_candidate":"simulation_or_modeling","study_design_consensus":"simulation_or_modeling","about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_system_candidate":false,"about_ca_system_consensus":false,"study_design_scores_codex":[0.00021427766,0.00005883483,0.0007094163,0.00027706227,0.00002251455,0.00020785148,0.000098347584,0.9499579,0.007877796,0.024523372,0.0033455146,0.012707185],"study_design_scores_gemma":[0.00006613087,0.00008009274,0.00016274194,0.000036437727,0.00002310061,0.000062158586,0.000010966287,0.9758388,0.0065054665,0.0064444146,0.010755723,0.000013959664],"about_ca_topic_score_codex":0.0073967585,"about_ca_topic_score_gemma":0.0062859035,"teacher_disagreement_score":0.013045351,"about_ca_system_score_codex":0.0012338532,"about_ca_system_score_gemma":0.0021316195,"threshold_uncertainty_score":0.04364103},"labels":[],"label_agreement":null},{"id":"W4380610161","doi":"10.12737/2219-0767-2023-16-2-85-93","title":"Routing buses impact analysis on the results on modeling standard digital cell on CMOS 28 nm","year":2023,"lang":"en","type":"article","venue":"Modeling of systems and processes","topic":"VLSI and FPGA Design Techniques","field":"Engineering","cited_by":1,"is_retracted":false,"has_abstract":true,"route_ca_aff":true,"route_ca_fund":false,"route_ca_venue":false,"route_about_ca":false,"ca_institutions":"Mitel (Canada)","funders":"","keywords":"Netlist; Routing (electronic design automation); Standard cell; Standard deviation; Set (abstract data type); Computer science; Simulation; CMOS; Real-time computing; Algorithm; Electronic engineering; Embedded system; Statistics; Integrated circuit; Engineering; Mathematics","score_opus":0.033232416721153415,"score_gpt":0.2527429747662627,"score_spread":0.21951055804510927,"validation_status":"score_only:v0-immature-baseline","prediction":{"id":"W4380610161","genre_codex":"empirical","genre_gemma":"empirical","domain_codex":null,"domain_gemma":null,"model_version":"metacan-v3-hybrid-931329e0061c","genre_candidate":"empirical","genre_consensus":"empirical","domain_candidate":null,"domain_consensus":null,"prediction_status":"machine_predicted_unvalidated","genre_scores_codex":[0.8605681,0.0007256259,0.126742,0.0001517725,0.0000422227,0.000037783775,0.00061153696,0.0011274489,0.009993508],"genre_scores_gemma":[0.98846984,0.00023256979,0.009633129,0.000019340776,0.000004875348,0.000014320237,0.0002396763,0.00011854488,0.0012677353],"study_design_codex":"simulation_or_modeling","study_design_gemma":"simulation_or_modeling","domain_scores_codex":[0.99982685,0.00004206985,0.0000081110975,0.000028641552,0.00006971227,0.000024588322],"domain_scores_gemma":[0.9993374,0.00039105435,0.00006217453,0.000076845325,0.00012447203,0.000008033595],"candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0002402962,0.0004124003,0.00018645515,0.00031194536,0.00014777081,0.00030437292,0.00038874702,0.00031043318,0.001957328],"category_scores_gemma":[0.0013830133,0.00012668097,0.00038213885,0.00030353718,0.00013411492,0.00045145673,0.00014675768,0.00018236817,0.00030383078],"study_design_candidate":"simulation_or_modeling","study_design_consensus":"simulation_or_modeling","about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_system_candidate":false,"about_ca_system_consensus":false,"study_design_scores_codex":[0.0001975449,0.00003340132,0.006193325,0.00030936234,0.000060269278,0.0003745327,0.00015565778,0.8671994,0.09309111,0.003918741,0.00066227745,0.027804397],"study_design_scores_gemma":[0.000007149989,0.0002742841,0.0024710917,0.000017863342,0.000071914816,0.00015064198,0.000058956026,0.90075386,0.09221653,0.00087181776,0.003091194,0.000014758149],"about_ca_topic_score_codex":0.0027832321,"about_ca_topic_score_gemma":0.0034763848,"teacher_disagreement_score":0.0027832321,"about_ca_system_score_codex":0.00047568834,"about_ca_system_score_gemma":0.0002951836,"threshold_uncertainty_score":0.006547928},"labels":[],"label_agreement":null},{"id":"W4408662702","doi":"10.12737/2219-0767-2025-44-51","title":"A set-theoretic model of a test structure for verifying in silicon libraries of standard digital elements","year":2025,"lang":"en","type":"article","venue":"Modeling of systems and processes","topic":"VLSI and Analog Circuit Testing","field":"Computer Science","cited_by":0,"is_retracted":false,"has_abstract":true,"route_ca_aff":true,"route_ca_fund":false,"route_ca_venue":false,"route_about_ca":false,"ca_institutions":"Mitel (Canada)","funders":"","keywords":"Set (abstract data type); Computer science; Test (biology); Programming language; Geology","score_opus":0.02561653560717215,"score_gpt":0.25223050171891986,"score_spread":0.22661396611174772,"validation_status":"score_only:v0-immature-baseline","prediction":{"id":"W4408662702","genre_codex":"methods","genre_gemma":"methods","domain_codex":null,"domain_gemma":null,"model_version":"metacan-v3-hybrid-931329e0061c","genre_candidate":"methods","genre_consensus":"methods","domain_candidate":null,"domain_consensus":null,"prediction_status":"machine_predicted_unvalidated","genre_scores_codex":[0.016758816,0.00011949912,0.97710735,0.0001582786,0.00001834815,0.00008749581,0.00016474264,0.00022099644,0.005364606],"genre_scores_gemma":[0.7079823,0.00038930037,0.28350204,0.00021479695,0.00007249436,0.0008391055,0.0005464638,0.000121761055,0.006331733],"study_design_codex":"simulation_or_modeling","study_design_gemma":"simulation_or_modeling","domain_scores_codex":[0.9985967,0.00039630616,0.000077713245,0.00022323271,0.00056829146,0.00013769767],"domain_scores_gemma":[0.99753726,0.0015875989,0.00023681035,0.00026122824,0.00031210887,0.000065015796],"candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.00127938,0.00082430535,0.0008731917,0.0012352166,0.0006808765,0.0022927774,0.0019696925,0.0015432854,0.0032645173],"category_scores_gemma":[0.0043796827,0.0005863358,0.0015738006,0.0007169443,0.0024920793,0.002375478,0.0009868705,0.0016130867,0.0008704442],"study_design_candidate":"simulation_or_modeling","study_design_consensus":"simulation_or_modeling","about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_system_candidate":false,"about_ca_system_consensus":false,"study_design_scores_codex":[0.00008279871,0.000054850123,0.00047183377,0.00011072181,0.00003126968,0.00015647059,0.00010997947,0.76337,0.0053638094,0.22129598,0.00041826002,0.008533966],"study_design_scores_gemma":[0.00001728315,0.00006582771,0.00007591131,0.000013414203,0.000011666282,0.000050407685,0.000010870169,0.95919454,0.0015192378,0.03827861,0.0007529058,0.000009344843],"about_ca_topic_score_codex":0.0038944858,"about_ca_topic_score_gemma":0.0028129257,"teacher_disagreement_score":0.0038944858,"about_ca_system_score_codex":0.0021572977,"about_ca_system_score_gemma":0.0021963876,"threshold_uncertainty_score":0.015652359},"labels":[],"label_agreement":null},{"id":"W4411541241","doi":"10.12737/2219-0767-2025-62-70","title":"Architecture of a test structure for verification of libraries of standard elements in silicon based on a pipeline-distribution approach","year":2025,"lang":"en","type":"article","venue":"Modeling of systems and processes","topic":"Radiation Effects in Electronics","field":"Engineering","cited_by":0,"is_retracted":false,"has_abstract":true,"route_ca_aff":true,"route_ca_fund":false,"route_ca_venue":false,"route_about_ca":false,"ca_institutions":"Mitel (Canada)","funders":"","keywords":"Pipeline (software); Computer science; Standard cell; Multiplexer; CMOS; Computer engineering; Computer architecture; Electronic engineering; Integrated circuit; Engineering; Programming language; Multiplexing; Operating system","score_opus":0.00708928536043458,"score_gpt":0.21899529730931747,"score_spread":0.2119060119488829,"validation_status":"score_only:v0-immature-baseline","prediction":{"id":"W4411541241","genre_codex":"methods","genre_gemma":"empirical","domain_codex":null,"domain_gemma":null,"model_version":"metacan-v3-hybrid-931329e0061c","genre_candidate":"empirical","genre_consensus":null,"domain_candidate":null,"domain_consensus":null,"prediction_status":"machine_predicted_unvalidated","genre_scores_codex":[0.066143975,0.00014550154,0.9267608,0.00009823986,0.000017388871,0.00021007204,0.00012315014,0.0031189423,0.0033819075],"genre_scores_gemma":[0.62947977,0.00009316707,0.3672086,0.000085743464,0.000020608046,0.00016230754,0.00028570244,0.00009082471,0.0025731726],"study_design_codex":"bench_or_experimental","study_design_gemma":"bench_or_experimental","domain_scores_codex":[0.99949265,0.000090541944,0.000036049598,0.0001032761,0.00021048641,0.00006683897],"domain_scores_gemma":[0.99934393,0.00017562511,0.000117740456,0.00012703419,0.00019827751,0.000037489044],"candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.00046280536,0.00036938093,0.00030063358,0.00089453,0.00043837432,0.0005224354,0.0015356402,0.0004502278,0.0028727234],"category_scores_gemma":[0.0007193681,0.00027721282,0.00042429328,0.00047289862,0.0005129212,0.0008635745,0.00050441554,0.0003517463,0.0005329087],"study_design_candidate":"bench_or_experimental","study_design_consensus":"bench_or_experimental","about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_system_candidate":false,"about_ca_system_consensus":false,"study_design_scores_codex":[0.0010824939,0.0003348129,0.007747073,0.00059047906,0.00013991515,0.0006604628,0.00039411342,0.097933546,0.49146146,0.03187838,0.0029972892,0.36477998],"study_design_scores_gemma":[0.00021670024,0.002866376,0.0046987114,0.0000637852,0.00021366955,0.0012784832,0.00008724059,0.5635449,0.39807943,0.0063554496,0.022513086,0.0000821288],"about_ca_topic_score_codex":0.0029202881,"about_ca_topic_score_gemma":0.0032168801,"teacher_disagreement_score":0.0029202881,"about_ca_system_score_codex":0.0010846991,"about_ca_system_score_gemma":0.0018273836,"threshold_uncertainty_score":0.009610236},"labels":[],"label_agreement":null},{"id":"W4411985875","doi":"10.12737/2219-0767-2025-18-2-62-70","title":"Architecture of a test structure for verification of libraries of standard elements in silicon based on a pipeline-distribution approach","year":2025,"lang":"en","type":"article","venue":"Modeling of systems and processes","topic":"Radiation Effects in Electronics","field":"Engineering","cited_by":0,"is_retracted":false,"has_abstract":true,"route_ca_aff":true,"route_ca_fund":false,"route_ca_venue":false,"route_about_ca":false,"ca_institutions":"Mitel (Canada)","funders":"","keywords":"Pipeline (software); Architecture; Computer science; Test (biology); Distribution (mathematics); Computer architecture; Programming language; Mathematics; Geology; Geography; Archaeology","score_opus":0.00708928536043458,"score_gpt":0.21899529730931747,"score_spread":0.2119060119488829,"validation_status":"score_only:v0-immature-baseline","prediction":{"id":"W4411985875","genre_codex":"methods","genre_gemma":"methods","domain_codex":null,"domain_gemma":null,"model_version":"metacan-v3-hybrid-931329e0061c","genre_candidate":"methods","genre_consensus":"methods","domain_candidate":null,"domain_consensus":null,"prediction_status":"machine_predicted_unvalidated","genre_scores_codex":[0.066143975,0.00014550154,0.9267608,0.00009823986,0.000017388871,0.00021007204,0.00012315014,0.0031189423,0.0033819075],"genre_scores_gemma":[0.62947977,0.00009316707,0.3672086,0.000085743464,0.000020608046,0.00016230754,0.00028570244,0.00009082471,0.0025731726],"study_design_codex":"bench_or_experimental","study_design_gemma":"simulation_or_modeling","domain_scores_codex":[0.99949265,0.000090541944,0.000036049598,0.0001032761,0.00021048641,0.00006683897],"domain_scores_gemma":[0.99934393,0.00017562511,0.000117740456,0.00012703419,0.00019827751,0.000037489044],"candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.00046280536,0.00036938093,0.00030063358,0.00089453,0.00043837432,0.0005224354,0.0015356402,0.0004502278,0.0028727234],"category_scores_gemma":[0.0007193681,0.00027721282,0.00042429328,0.00047289862,0.0005129212,0.0008635745,0.00050441554,0.0003517463,0.0005329087],"study_design_candidate":"simulation_or_modeling","study_design_consensus":null,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_system_candidate":false,"about_ca_system_consensus":false,"study_design_scores_codex":[0.0010824939,0.0003348129,0.007747073,0.00059047906,0.00013991515,0.0006604628,0.00039411342,0.097933546,0.49146146,0.03187838,0.0029972892,0.36477998],"study_design_scores_gemma":[0.00021670024,0.002866376,0.0046987114,0.0000637852,0.00021366955,0.0012784832,0.00008724059,0.5635449,0.39807943,0.0063554496,0.022513086,0.0000821288],"about_ca_topic_score_codex":0.0029202881,"about_ca_topic_score_gemma":0.0032168801,"teacher_disagreement_score":0.0029202881,"about_ca_system_score_codex":0.0010846991,"about_ca_system_score_gemma":0.0018273836,"threshold_uncertainty_score":0.009610236},"labels":[],"label_agreement":null}]}