{"meta":{"page":1,"per_page":50,"max_per_page":100,"total":754,"total_is_capped":false,"direct_labels_cover":0,"predictions_cover":754,"direct_label_status":"direct model label, unvalidated","prediction_status":"machine_predicted_unvalidated (Codex and Gemma teacher distillation)","score_status":"score_only:v0-immature-baseline (scores rank; they never assert a category)","snapshot":{"source":"OpenAlex, pinned release, all 482 partitions","release":"2026-06-24","frame_built":"2026-07-12","author_layer_release":"2026-06-26"},"query_hash":"a0ceefc2e3c7","filters":{"topic":"Embedded Systems Design Techniques"}},"results":[{"id":"W2018055497","doi":"10.1145/1950413.1950423","title":"LegUp","year":2011,"lang":"en","type":"article","venue":"","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":524,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"Alterra Power (Canada); University of Toronto","funders":"","keywords":"Computer science; Field-programmable gate array; Embedded system; Software; Hardware architecture; Computer hardware; Interface (matter); Computer architecture; High-level synthesis; Operating system","authors":[{"name":"Andrew Canis","is_ca":true},{"name":"Jongsok Choi","is_ca":true},{"name":"Mark Aldham","is_ca":true},{"name":"Victor Zhang","is_ca":true},{"name":"Ahmed Kammoona","is_ca":true},{"name":"Jason H. Anderson","is_ca":true},{"name":"Stephen D. Brown","is_ca":true},{"name":"Tomasz Czajkowski","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.06753682214906677,"gpt":0.2283635975342483,"spread":0.1608267753851816,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":["insufficient_payload"],"consensus_categories":[],"category_scores_codex":[0.0005168306,0.0009671606,0.0004767737,0.0008815142,0.0004316155,0.001486751,0.001985951,0.0008757886,0.07353056],"category_scores_gemma":[0.001453731,0.0006372305,0.0008949294,0.000510103,0.0004009559,0.001498967,0.001685308,0.001138701,0.03518265],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0004011356,"about_ca_system_score_gemma":0.0006681767,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.0008142631,"about_ca_topic_score_gemma":0.001554957,"domain_scores_codex":[0.9992767,0.0001038211,0.00004687241,0.0001724933,0.0002977629,0.0001023996],"domain_scores_gemma":[0.9994361,0.0002136296,0.00003843853,0.0001380738,0.0001353568,0.00003841951],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"design_other","study_design_gemma":"not_applicable","study_design_scores_codex":[0.0009566751,0.0002056677,0.002072572,0.001618813,0.0001336325,0.0006842994,0.0003167642,0.01299924,0.04111141,0.04426374,0.2006715,0.6949657],"study_design_scores_gemma":[0.0001370796,0.000221686,0.001014168,0.0001483352,0.00006278355,0.001022588,0.00005026771,0.03553371,0.04416802,0.0184194,0.8991204,0.000101562],"study_design_candidate":"not_applicable","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"other","genre_scores_codex":[0.01000536,0.001350893,0.6894811,0.0003402976,0.0005913345,0.0003263022,0.005624665,0.2016502,0.09062991],"genre_scores_gemma":[0.1392268,0.00144754,0.6332854,0.002187198,0.0002303233,0.0008846878,0.03419681,0.05598178,0.1325594],"genre_candidate":"other","genre_consensus":null,"teacher_disagreement_score":0.9264694,"threshold_uncertainty_score":0,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W4206262605","doi":"10.1561/1000000005","title":"FPGA Architecture: Survey and Challenges","year":2008,"lang":"en","type":"article","venue":"Foundations and Trends® in Electronic Design Automation","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":411,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Toronto","funders":"","keywords":"Field-programmable gate array; Architecture; Computer architecture; Computer science; Embedded system; Software engineering; Geography; Archaeology","authors":[{"name":"Ian Kuon","is_ca":true},{"name":"Russell Tessier","is_ca":false},{"name":"Jonathan Rose","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.06574561753306661,"gpt":0.2806721055906656,"spread":0.214926488057599,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0008017847,0.0006012067,0.0005310613,0.001733292,0.0003927394,0.002043988,0.001029946,0.001122473,0.006135291],"category_scores_gemma":[0.0016249,0.0005055289,0.0002659888,0.00284657,0.0004048999,0.002893474,0.0005271487,0.001022693,0.003402441],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0007039255,"about_ca_system_score_gemma":0.0009102061,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.001446937,"about_ca_topic_score_gemma":0.001774243,"domain_scores_codex":[0.9994459,0.00008848553,0.00005931846,0.00007801556,0.0002884442,0.00003988644],"domain_scores_gemma":[0.9990956,0.0003155262,0.00004335378,0.00007921122,0.0004077928,0.00005857314],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"design_other","study_design_gemma":"not_applicable","study_design_scores_codex":[0.0000743157,0.00004621858,0.001246105,0.001585271,0.00002335429,0.0002087864,0.0000869626,0.008111096,0.00208642,0.04098006,0.03226636,0.913285],"study_design_scores_gemma":[0.00002544428,0.0002133375,0.001792109,0.001085687,0.00003392879,0.002232002,0.0002148748,0.0136758,0.002063222,0.02257096,0.9560429,0.00004977217],"study_design_candidate":"not_applicable","study_design_consensus":null,"genre_codex":"review","genre_gemma":"review","genre_scores_codex":[0.01370654,0.8036768,0.0774781,0.006259285,0.001437793,0.0001049939,0.0002635097,0.0007370322,0.09633587],"genre_scores_gemma":[0.07260241,0.8327802,0.05696706,0.001707813,0.001973004,0.00009802324,0.000786908,0.0001585751,0.03292605],"genre_candidate":"review","genre_consensus":"review","teacher_disagreement_score":0.006135291,"threshold_uncertainty_score":0.02052456,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2133712953","doi":"10.1145/1117201.1117205","title":"Measuring the gap between FPGAs and ASICs","year":2006,"lang":"en","type":"article","venue":"","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":319,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":true,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Toronto","funders":"Natural Sciences and Engineering Research Council of Canada; CMC Microsystems","keywords":"Field-programmable gate array; Application-specific integrated circuit; Computer science; Embedded system","authors":[{"name":"Ian Kuon","is_ca":true},{"name":"Jonathan Rose","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.05732438770549496,"gpt":0.2472154155981802,"spread":0.1898910278926852,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0004962045,0.0002714557,0.0002225956,0.0006260644,0.0002844474,0.0007005609,0.0007017024,0.0003986533,0.003273003],"category_scores_gemma":[0.003664983,0.000166278,0.00008298596,0.0004666903,0.0003869813,0.001742859,0.0006133599,0.0004144156,0.0004113041],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0004580517,"about_ca_system_score_gemma":0.0001856115,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.0003849526,"about_ca_topic_score_gemma":0.0003487969,"domain_scores_codex":[0.9989538,0.0001331508,0.00006397945,0.0001663041,0.0005377699,0.0001449167],"domain_scores_gemma":[0.9976642,0.001338218,0.0002202511,0.0002567711,0.0004342603,0.0000863813],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"bench_or_experimental","study_design_gemma":"bench_or_experimental","study_design_scores_codex":[0.00339725,0.0004209384,0.02288868,0.0008916069,0.0001678227,0.001169219,0.001507499,0.02858946,0.7041011,0.02013309,0.00285339,0.21388],"study_design_scores_gemma":[0.0001536827,0.004368233,0.02306802,0.0001000177,0.0001377209,0.001678334,0.001368769,0.06743016,0.8610204,0.007570481,0.03305276,0.00005142431],"study_design_candidate":"bench_or_experimental","study_design_consensus":"bench_or_experimental","genre_codex":"empirical","genre_gemma":"empirical","genre_scores_codex":[0.9642616,0.0009879668,0.02522992,0.0002282565,0.0000880278,0.00002823701,0.0001387415,0.0004883888,0.008548877],"genre_scores_gemma":[0.9910756,0.0002698352,0.006584738,0.00008819323,0.00001333584,0.00003069629,0.000131388,0.00004499012,0.001761221],"genre_candidate":"empirical","genre_consensus":"empirical","teacher_disagreement_score":0.003273003,"threshold_uncertainty_score":0.01094931,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W1970032753","doi":"10.1145/2514740","title":"LegUp","year":2013,"lang":"en","type":"article","venue":"ACM Transactions on Embedded Computing Systems","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":302,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":true,"ca_venue":false,"about_ca":false},"ca_institutions":"Alterra Power (Canada); University of Toronto","funders":"Natural Sciences and Engineering Research Council of Canada","keywords":"Computer science; Software; Hardware architecture; High-level synthesis; Computer hardware; Field-programmable gate array; Hardware compatibility list; Embedded system; Computer architecture; Benchmark (surveying); Pointer (user interface); Operating system","authors":[{"name":"Andrew Canis","is_ca":true},{"name":"Jongsok Choi","is_ca":true},{"name":"Mark Aldham","is_ca":true},{"name":"Victor Zhang","is_ca":true},{"name":"Ahmed Kammoona","is_ca":true},{"name":"Tomasz Czajkowski","is_ca":true},{"name":"Stephen D. Brown","is_ca":true},{"name":"Jason H. Anderson","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.02059518941063918,"gpt":0.2544216356610847,"spread":0.2338264462504455,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0006805965,0.001315957,0.0006427841,0.001126331,0.0006006852,0.001694206,0.002573093,0.001070365,0.129429],"category_scores_gemma":[0.002151181,0.0007534777,0.00104543,0.0007295933,0.0004990872,0.001563869,0.001879394,0.001311301,0.05988308],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0006260769,"about_ca_system_score_gemma":0.001136983,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.001805279,"about_ca_topic_score_gemma":0.002632048,"domain_scores_codex":[0.999261,0.00008452961,0.00004725957,0.0001832739,0.0003019432,0.0001219717],"domain_scores_gemma":[0.9992248,0.0002367589,0.00006097742,0.0001703047,0.0002469381,0.0000601804],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"design_other","study_design_gemma":"bench_or_experimental","study_design_scores_codex":[0.001296866,0.0002175846,0.002547005,0.002018179,0.0001294206,0.0005972485,0.0003717042,0.01694979,0.03752236,0.04353331,0.3761976,0.5186188],"study_design_scores_gemma":[0.0002130182,0.000278221,0.001374762,0.0002035103,0.0000616531,0.000740038,0.000066801,0.0445443,0.0460013,0.0185674,0.887837,0.0001121288],"study_design_candidate":"bench_or_experimental","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.01280736,0.001799344,0.4309874,0.0005817225,0.0006286507,0.000589764,0.01677721,0.3486714,0.1871571],"genre_scores_gemma":[0.1501318,0.001759818,0.4573592,0.002401835,0.0002039528,0.001508466,0.07462928,0.09478859,0.217217],"genre_candidate":"empirical","genre_consensus":null,"teacher_disagreement_score":0.129429,"threshold_uncertainty_score":0,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2980612421","doi":"10.1145/3357375","title":"A Survey of Coarse-Grained Reconfigurable Architecture and Design","year":2019,"lang":"en","type":"review","venue":"ACM Computing Surveys","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":225,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Alberta","funders":"National Key Research and Development Program of China; National Science and Technology Major Project; National Natural Science Foundation of China","keywords":"Computer science; Computer architecture; Adaptability; Flexibility (engineering); Architecture; Software; Embedded system; Software engineering; Operating system","authors":[{"name":"Jianfeng Zhu","is_ca":false},{"name":"Zhaoshi Li","is_ca":false},{"name":"Yanan Lu","is_ca":false},{"name":"Yangdong Deng","is_ca":false},{"name":"Jie Han","is_ca":true},{"name":"Shouyi Yin","is_ca":false},{"name":"Shaojun Wei","is_ca":false}],"retraction":null,"screen_n_in":null,"score":{"opus":0.1633039885285404,"gpt":0.3508125939290486,"spread":0.1875086054005081,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0006488517,0.0008766648,0.000692885,0.003216938,0.0003668252,0.001208742,0.001110502,0.0009298743,0.008057806],"category_scores_gemma":[0.001571338,0.0004941876,0.0004820075,0.005868495,0.0004555136,0.002253232,0.0005904535,0.0009676518,0.004994876],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0006931505,"about_ca_system_score_gemma":0.001476156,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.001258964,"about_ca_topic_score_gemma":0.002012929,"domain_scores_codex":[0.9995329,0.00005313781,0.00005085002,0.00007756461,0.0002463436,0.00003919366],"domain_scores_gemma":[0.9991165,0.0003938885,0.00007628965,0.00009334261,0.0002729168,0.00004703091],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"design_other","study_design_gemma":"not_applicable","study_design_scores_codex":[0.00001945098,0.00004358872,0.0003416259,0.00602142,0.00002300268,0.00006065591,0.00007423825,0.002533799,0.002007033,0.0227785,0.03172527,0.9343714],"study_design_scores_gemma":[0.000004781512,0.00006408188,0.0005795151,0.00192695,0.00002774249,0.0005106184,0.00006149619,0.001584106,0.0009685658,0.009741805,0.9845085,0.00002177861],"study_design_candidate":"not_applicable","study_design_consensus":null,"genre_codex":"review","genre_gemma":"review","genre_scores_codex":[0.001295595,0.9604692,0.01612465,0.0008318666,0.0005819473,0.00003296993,0.0001188396,0.0002274735,0.02031735],"genre_scores_gemma":[0.006756063,0.9723949,0.01237748,0.0004691003,0.0005526741,0.0000401285,0.0002997924,0.00005166182,0.007058227],"genre_candidate":"review","genre_consensus":"review","teacher_disagreement_score":0.008057806,"threshold_uncertainty_score":0.02695602,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2741661236","doi":"10.1109/asap.2017.7995277","title":"CGRA-ME: A unified framework for CGRA modelling and exploration","year":2017,"lang":"en","type":"article","venue":"","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":156,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Toronto","funders":"","keywords":"Computer science; Computer architecture; Architecture; Field-programmable gate array; Design flow; Microarchitecture; Embedded system","authors":[{"name":"S. Alexander Chin","is_ca":false},{"name":"Noriaki Sakamoto","is_ca":false},{"name":"Allan Rui","is_ca":true},{"name":"Jim Zhao","is_ca":true},{"name":"Jin Hee Kim","is_ca":true},{"name":"Yuko Hara–Azumi","is_ca":false},{"name":"Jason H. Anderson","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.113824749314257,"gpt":0.3302217807785392,"spread":0.2163970314642822,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.001819276,0.001588777,0.001039338,0.001417733,0.0008229135,0.003491762,0.004326639,0.002054834,0.007055824],"category_scores_gemma":[0.004755486,0.001021968,0.002602478,0.001080677,0.001478307,0.00255439,0.00273646,0.003138562,0.002215641],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.001091851,"about_ca_system_score_gemma":0.003008967,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.006085714,"about_ca_topic_score_gemma":0.01091849,"domain_scores_codex":[0.999033,0.0002752673,0.0001020608,0.0001339835,0.0003520639,0.0001036507],"domain_scores_gemma":[0.9986776,0.000547548,0.00009842075,0.0003662491,0.0002411234,0.00006913434],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"simulation_or_modeling","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.00008776935,0.00007695397,0.001184433,0.0008552317,0.0001238193,0.0002959494,0.0005153361,0.6992675,0.00810599,0.1992549,0.01315836,0.07707384],"study_design_scores_gemma":[0.00003807356,0.00004140215,0.0001526684,0.0001542344,0.00003497874,0.0001634586,0.00008194046,0.8241926,0.00476214,0.0705457,0.09978093,0.00005193746],"study_design_candidate":"simulation_or_modeling","study_design_consensus":"simulation_or_modeling","genre_codex":"methods","genre_gemma":"methods","genre_scores_codex":[0.001221512,0.0002419379,0.9889648,0.0001325547,0.00003006502,0.0001031325,0.0004807569,0.006205094,0.002620196],"genre_scores_gemma":[0.038235,0.0006888439,0.9535998,0.0001635377,0.00003689576,0.0006294727,0.001927306,0.002429144,0.002290098],"genre_candidate":"methods","genre_consensus":"methods","teacher_disagreement_score":0.007055824,"threshold_uncertainty_score":0.02360409,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2093994565","doi":"10.1145/1723112.1723122","title":"Efficient multi-ported memories for FPGAs","year":2010,"lang":"en","type":"article","venue":"","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":129,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Toronto","funders":"","keywords":"Porting; Computer science; Stratix; Field-programmable gate array; Block (permutation group theory); Reduction (mathematics); Embedded system; Parallel computing; Computer hardware; Operating system; Software; Mathematics","authors":[{"name":"Charles Eric LaForest","is_ca":true},{"name":"J. Gregory Steffan","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.02566097907114821,"gpt":0.2918412105642328,"spread":0.2661802314930846,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0001897742,0.0003005688,0.0002086576,0.0002519063,0.0001549627,0.0006106889,0.001097944,0.0002716918,0.003873514],"category_scores_gemma":[0.0004116559,0.0001932445,0.0001856023,0.000327036,0.0001910753,0.001142655,0.0004450457,0.000415696,0.0006010159],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0003258904,"about_ca_system_score_gemma":0.0002711311,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.0002009566,"about_ca_topic_score_gemma":0.0006984557,"domain_scores_codex":[0.9998155,0.00003642559,0.00001596624,0.00002348598,0.00007747097,0.00003111007],"domain_scores_gemma":[0.9997352,0.00006589406,0.00004618046,0.00008433792,0.00005507577,0.00001345231],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"bench_or_experimental","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.0008056816,0.0001590317,0.00230189,0.0008775719,0.0001465385,0.000656978,0.0001409432,0.1041718,0.4502412,0.04386225,0.005777066,0.390859],"study_design_scores_gemma":[0.0001827871,0.001222197,0.001711904,0.00009497331,0.0001156114,0.000915077,0.000114007,0.2891738,0.6562124,0.01362635,0.03658843,0.00004236672],"study_design_candidate":"simulation_or_modeling","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.3989586,0.002763894,0.5722485,0.0003959806,0.0001456132,0.0001240159,0.0002313752,0.003318201,0.02181384],"genre_scores_gemma":[0.7624627,0.0005206545,0.2298914,0.0001176869,0.0000230328,0.00008606896,0.000177066,0.00008817265,0.006633228],"genre_candidate":"empirical","genre_consensus":null,"teacher_disagreement_score":0.003873514,"threshold_uncertainty_score":0.01295823,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2533368764","doi":"10.1109/icm.2006.373294","title":"Soft-Core Processors for Embedded Systems","year":2006,"lang":"en","type":"article","venue":"","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":118,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Windsor","funders":"","keywords":"Computer science; Embedded system; Application-specific integrated circuit; Multi-core processor; Flexibility (engineering); Computer architecture; Field-programmable gate array; Software; Obsolescence; Core (optical fiber); Dataflow; Soft error; Operating system; Engineering","authors":[{"name":"Jason G. Tong","is_ca":true},{"name":"Ian D. L. Anderson","is_ca":true},{"name":"Mohammed Khalid","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.02824565982339589,"gpt":0.2723407080114815,"spread":0.2440950481880856,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0003267939,0.0009232773,0.0005789321,0.0008246896,0.0004990613,0.001532463,0.001004073,0.001081798,0.01977872],"category_scores_gemma":[0.001731769,0.0003301225,0.0003700434,0.001182993,0.0006050622,0.001535144,0.001127927,0.002086328,0.01096054],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0004329991,"about_ca_system_score_gemma":0.0006472468,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.0002686516,"about_ca_topic_score_gemma":0.0004206694,"domain_scores_codex":[0.9994017,0.00009135783,0.00005806459,0.00007047551,0.0003376815,0.0000408553],"domain_scores_gemma":[0.9993192,0.0002172282,0.0000701104,0.0001250549,0.0002342324,0.00003417384],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"design_other","study_design_gemma":"bench_or_experimental","study_design_scores_codex":[0.0001601076,0.00008097963,0.000315237,0.002736392,0.00005262635,0.0005248875,0.0002767559,0.01300956,0.03322915,0.3055666,0.0632132,0.5808344],"study_design_scores_gemma":[0.00004670418,0.0001258807,0.0002181771,0.0004295226,0.00003524179,0.001044668,0.00007297173,0.02315045,0.01634143,0.09449376,0.8640004,0.00004093378],"study_design_candidate":"bench_or_experimental","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.005552417,0.04080963,0.8496223,0.001601329,0.002262436,0.0004326833,0.0005262362,0.004999074,0.09419394],"genre_scores_gemma":[0.1134869,0.0471803,0.7047307,0.002790589,0.001307799,0.001085708,0.002080366,0.001262023,0.1260757],"genre_candidate":"empirical","genre_consensus":null,"teacher_disagreement_score":0.01977872,"threshold_uncertainty_score":0.06616646,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2000336625","doi":"10.1145/2043662.2043663","title":"A Model-Driven Design Framework for Massively Parallel Embedded Systems","year":2011,"lang":"en","type":"article","venue":"ACM Transactions on Embedded Computing Systems","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":105,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"Polytechnique Montréal","funders":"","keywords":"Computer science; Massively parallel; Abstraction; Design space exploration; Implementation; Abstraction layer; Model of computation; Electronic system-level design and verification; Embedded system; Computer architecture; Computation; Distributed computing; Parallel computing; Programming language; Software","authors":[{"name":"Abdoulaye Gamatié","is_ca":false},{"name":"Sébastien Le Beux","is_ca":true},{"name":"Éric Piel","is_ca":false},{"name":"Rabie Ben Atitallah","is_ca":false},{"name":"Anne Etien","is_ca":false},{"name":"Philippe Marquet","is_ca":false},{"name":"Jean‐Luc Dekeyser","is_ca":false}],"retraction":null,"screen_n_in":null,"score":{"opus":0.1350993031911067,"gpt":0.3054896980375446,"spread":0.1703903948464378,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.002452931,0.00162128,0.0009525361,0.0009168416,0.0007708395,0.002470671,0.00315524,0.001774667,0.004360253],"category_scores_gemma":[0.001967002,0.001094128,0.002367376,0.0006604922,0.001616649,0.001455538,0.001871453,0.002714782,0.001322096],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.001457401,"about_ca_system_score_gemma":0.003068623,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.005215396,"about_ca_topic_score_gemma":0.006676302,"domain_scores_codex":[0.9986634,0.0003691736,0.0001082853,0.0001400834,0.0006201559,0.00009879127],"domain_scores_gemma":[0.9994175,0.0002389735,0.00005695252,0.0001082018,0.0001368041,0.00004153377],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"simulation_or_modeling","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.00003901316,0.00005597092,0.0002194098,0.0004857579,0.00007358361,0.0003345622,0.0002791672,0.6088696,0.00742463,0.3406666,0.002963184,0.03858851],"study_design_scores_gemma":[0.00007292719,0.0000888204,0.00007066222,0.0001641084,0.0000575311,0.0001588357,0.00004322536,0.8166906,0.003046162,0.09946316,0.08010533,0.00003867209],"study_design_candidate":"simulation_or_modeling","study_design_consensus":"simulation_or_modeling","genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.0005399478,0.0002771676,0.9956734,0.0001686962,0.00003510595,0.000133211,0.00007531671,0.0006619391,0.002435165],"genre_scores_gemma":[0.03366846,0.00110801,0.9595616,0.0001455935,0.00004947479,0.0009300943,0.0003638802,0.0002881468,0.003884675],"genre_candidate":"empirical","genre_consensus":null,"teacher_disagreement_score":0.005215396,"threshold_uncertainty_score":0.01458651,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2098681688","doi":"10.1145/1086297.1086325","title":"The microarchitecture of FPGA-based soft processors","year":2005,"lang":"en","type":"article","venue":"","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":97,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Toronto","funders":"","keywords":"Microarchitecture; Computer science; Field-programmable gate array; Parallel computing; Computer architecture; Embedded system","authors":[{"name":"Peter Yiannacouras","is_ca":true},{"name":"Jonathan Rose","is_ca":true},{"name":"J. Gregory Steffan","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.008604874053759428,"gpt":0.2401698363044486,"spread":0.2315649622506892,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0001849302,0.0002588772,0.00009677724,0.0003546897,0.0001565586,0.0004316299,0.0004004019,0.0002248158,0.002459536],"category_scores_gemma":[0.001003077,0.0002390139,0.0001721072,0.000215715,0.0002597287,0.0003775897,0.000126085,0.0003305905,0.0004736951],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0004110127,"about_ca_system_score_gemma":0.0004494825,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.001255422,"about_ca_topic_score_gemma":0.002200567,"domain_scores_codex":[0.9997494,0.00005940272,0.00001883431,0.00002876917,0.0001199815,0.0000236758],"domain_scores_gemma":[0.9995353,0.0001990807,0.0000670916,0.0001075914,0.00007969756,0.00001118721],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"simulation_or_modeling","study_design_gemma":"bench_or_experimental","study_design_scores_codex":[0.0003501748,0.00008393901,0.006053909,0.000335398,0.0000402386,0.0004220419,0.0002307134,0.6074771,0.1694209,0.03720066,0.004008232,0.1743768],"study_design_scores_gemma":[0.00005468606,0.000311245,0.004721259,0.00004233499,0.00003614679,0.0002810907,0.00004380775,0.8871365,0.08033343,0.01294299,0.01406987,0.00002666083],"study_design_candidate":"bench_or_experimental","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.4795846,0.000765465,0.4877121,0.0002715164,0.00009598633,0.0002258868,0.0006764785,0.005271548,0.02539643],"genre_scores_gemma":[0.8748732,0.0002696647,0.1185555,0.0001034098,0.00001309364,0.0001636211,0.0004013462,0.000314987,0.005305137],"genre_candidate":"empirical","genre_consensus":null,"teacher_disagreement_score":0.002459536,"threshold_uncertainty_score":0.008227944,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2071189607","doi":"10.1109/fpl.2014.6927490","title":"Modulo SDC scheduling with recurrence minimization in high-level synthesis","year":2014,"lang":"en","type":"article","venue":"","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":91,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Toronto","funders":"","keywords":"Modulo; Computer science; Scheduling (production processes); Software pipelining; High-level synthesis; Backtracking; Parallel computing; Algorithm; Mathematical optimization; Embedded system; Mathematics; Field-programmable gate array","authors":[{"name":"Andrew Canis","is_ca":true},{"name":"Stephen D. Brown","is_ca":true},{"name":"Jason H. Anderson","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.02558949823905153,"gpt":0.2368146874759209,"spread":0.2112251892368693,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0007079196,0.0003580178,0.0002948919,0.0005173447,0.000361579,0.0004677108,0.0006687365,0.0001976381,0.001842743],"category_scores_gemma":[0.001676995,0.0001935523,0.0003550894,0.0005985669,0.0005433117,0.0005814944,0.000499193,0.0005062828,0.0003194078],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.000780784,"about_ca_system_score_gemma":0.001759545,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.002390041,"about_ca_topic_score_gemma":0.003849594,"domain_scores_codex":[0.999432,0.0001528761,0.00004373871,0.00006887761,0.0002383774,0.00006401032],"domain_scores_gemma":[0.9993486,0.0002566538,0.0000962124,0.0001480073,0.0001260506,0.00002450494],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"simulation_or_modeling","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.0002423784,0.0001590005,0.001422884,0.0002288989,0.00002719381,0.0002337876,0.0002165781,0.4901619,0.06181719,0.08038086,0.003725974,0.3613834],"study_design_scores_gemma":[0.00005979835,0.0001487199,0.0002165851,0.00002162321,0.00001829664,0.00007309408,0.00002848104,0.9329079,0.04202436,0.01767347,0.006813385,0.00001429974],"study_design_candidate":"simulation_or_modeling","study_design_consensus":"simulation_or_modeling","genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.03927984,0.0001827541,0.9537596,0.0001158335,0.0000466908,0.0000709425,0.0000449422,0.001479774,0.005019756],"genre_scores_gemma":[0.5243129,0.0001645023,0.4725727,0.00009007674,0.00005068591,0.00008862993,0.0001047759,0.0002137407,0.002401925],"genre_candidate":"empirical","genre_consensus":null,"teacher_disagreement_score":0.002390041,"threshold_uncertainty_score":0.006164551,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2103518090","doi":"10.1145/360276.360328","title":"The effect of reconfigurable units in superscalar processors","year":2001,"lang":"en","type":"article","venue":"","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":89,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Toronto","funders":"","keywords":"Computer science; Superscalar; Control reconfiguration; Computer architecture; Reduced instruction set computing; Pipeline (software); Instruction scheduling; Parallel computing; Scheduling (production processes); Architecture; Instruction set; Microarchitecture; Embedded system; Dynamic priority scheduling; Schedule; Operating system; Engineering; Two-level scheduling","authors":[{"name":"Jorge Espejo Carrillo","is_ca":true},{"name":"Paul Chow","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.01308495822640767,"gpt":0.2450951931520731,"spread":0.2320102349256655,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0002182177,0.0006622404,0.0002931411,0.0003579555,0.0002763225,0.000532226,0.0005392349,0.0003824428,0.006314123],"category_scores_gemma":[0.001787569,0.0002645466,0.0003879794,0.0002888606,0.0004324123,0.001100864,0.000544747,0.0004540879,0.0008746298],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0002067416,"about_ca_system_score_gemma":0.0001824666,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.0004087227,"about_ca_topic_score_gemma":0.0004676083,"domain_scores_codex":[0.9997392,0.00006237179,0.00001351237,0.00003527123,0.00008559575,0.00006409451],"domain_scores_gemma":[0.9988437,0.0007145994,0.0001324516,0.0001384727,0.00009253954,0.00007833555],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"bench_or_experimental","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.002686311,0.0003355606,0.004210618,0.0009454399,0.0001720536,0.0008833462,0.0003010598,0.129125,0.4546113,0.0329925,0.003196726,0.3705401],"study_design_scores_gemma":[0.0003551313,0.005101278,0.01026733,0.0001837083,0.0007670925,0.001665321,0.0002177732,0.1116626,0.7906345,0.01538215,0.06364346,0.0001195663],"study_design_candidate":"simulation_or_modeling","study_design_consensus":null,"genre_codex":"empirical","genre_gemma":"empirical","genre_scores_codex":[0.8546361,0.01354787,0.05809544,0.0005017181,0.0007445056,0.00007021915,0.0002134306,0.003447972,0.06874265],"genre_scores_gemma":[0.9799693,0.002180793,0.0117389,0.0002800624,0.0001852131,0.00001769802,0.00009960262,0.0002337161,0.005294779],"genre_candidate":"empirical","genre_consensus":"empirical","teacher_disagreement_score":0.006314123,"threshold_uncertainty_score":0.02112287,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2151471392","doi":"10.1109/fccm.2011.48","title":"FUSE: Front-End User Framework for O/S Abstraction of Hardware Accelerators","year":2011,"lang":"en","type":"article","venue":"","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":76,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"Simon Fraser University","funders":"","keywords":"Computer science; Embedded system; Fuse (electrical); Field-programmable gate array; Operating system; Front and back ends; Software; Abstraction; Process (computing); Computer architecture; Hardware acceleration; Computer hardware; Engineering","authors":[{"name":"Aws Ismail","is_ca":true},{"name":"Lesley Shannon","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.07185354450616706,"gpt":0.2948013455393196,"spread":0.2229478010331525,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.001990797,0.00204301,0.0009835496,0.001441119,0.0006829027,0.002579582,0.00296697,0.001800641,0.01796179],"category_scores_gemma":[0.004124423,0.001269998,0.00179756,0.0005643306,0.0009584388,0.003065037,0.002935698,0.002360062,0.006655715],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0009139433,"about_ca_system_score_gemma":0.00110985,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.003723567,"about_ca_topic_score_gemma":0.003739774,"domain_scores_codex":[0.9990878,0.0001412798,0.00009700996,0.0001165748,0.0003503175,0.0002069826],"domain_scores_gemma":[0.9986756,0.000476118,0.00008566336,0.0003959328,0.0002323097,0.0001342712],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"design_other","study_design_gemma":"bench_or_experimental","study_design_scores_codex":[0.003382997,0.000443778,0.007068929,0.00139299,0.0003032809,0.002639587,0.003177522,0.0409054,0.07720625,0.1673811,0.1528988,0.5431994],"study_design_scores_gemma":[0.0004064065,0.0004541583,0.002621516,0.000416976,0.0001488064,0.001817446,0.0003043561,0.3733345,0.09241448,0.06733226,0.4604136,0.000335572],"study_design_candidate":"bench_or_experimental","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.005833768,0.0002852744,0.8690977,0.0001356435,0.00008052,0.0001809183,0.0006900864,0.1163723,0.00732374],"genre_scores_gemma":[0.3039277,0.00102338,0.6221171,0.0009233963,0.0002291199,0.0009295981,0.004544399,0.032773,0.03353225],"genre_candidate":"empirical","genre_consensus":null,"teacher_disagreement_score":0.01796179,"threshold_uncertainty_score":0.06008822,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2052930524","doi":"10.1109/fpl.2013.6645515","title":"A high-performance overlay architecture for pipelined execution of data flow graphs","year":2013,"lang":"en","type":"article","venue":"","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":74,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Toronto","funders":"","keywords":"Computer science; Overlay; Scalability; Field-programmable gate array; Pipeline (software); Stratix; Computer architecture; Parallel computing; Abstraction; Overlay network; Software; Architecture; Throughput; Embedded system; Computer hardware; Operating system","authors":[{"name":"Davor Capalija","is_ca":true},{"name":"Tarek S. Abdelrahman","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.02717006953071272,"gpt":0.2602762525529136,"spread":0.2331061830222009,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.000222764,0.0003332616,0.0002070697,0.0004376893,0.0003232974,0.0004029607,0.0007209892,0.0002786054,0.002660603],"category_scores_gemma":[0.0007500327,0.0001684872,0.0001919195,0.0005173427,0.0002735234,0.0006754285,0.0003960421,0.0003490389,0.0003414464],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0007290453,"about_ca_system_score_gemma":0.0006381594,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.00284402,"about_ca_topic_score_gemma":0.00419913,"domain_scores_codex":[0.9998087,0.0000371291,0.00001609264,0.00003290196,0.00006715905,0.00003804317],"domain_scores_gemma":[0.9996545,0.0001005852,0.00003752137,0.00008147495,0.00008589908,0.00003994061],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"bench_or_experimental","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.001192822,0.0003531524,0.005224578,0.0005455535,0.0001026551,0.0008510692,0.0004727216,0.3157027,0.3260137,0.02782046,0.01533951,0.3063811],"study_design_scores_gemma":[0.0001496378,0.001253242,0.003202768,0.00003819174,0.00007575117,0.0003626944,0.0001165221,0.8363743,0.1250582,0.007914411,0.02538931,0.00006501245],"study_design_candidate":"simulation_or_modeling","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.4832204,0.0004903431,0.4928928,0.0002107405,0.00008566469,0.0001663637,0.0003534783,0.01056925,0.01201111],"genre_scores_gemma":[0.8114573,0.0001656304,0.1850656,0.00004682887,0.0000177254,0.00008092593,0.0004039048,0.0001896157,0.002572441],"genre_candidate":"empirical","genre_consensus":null,"teacher_disagreement_score":0.00284402,"threshold_uncertainty_score":0.008900583,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2023777102","doi":"10.1109/tvlsi.2005.863187","title":"Design and verification of SystemC transaction-level models","year":2006,"lang":"en","type":"article","venue":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":69,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"Concordia University","funders":"","keywords":"SystemC; Computer science; Transaction-level modeling; Correctness; Abstract state machines; Electronic system-level design and verification; Programming language; Formal verification; Embedded system; High-level synthesis; Unified Modeling Language; Computer architecture; Finite-state machine; Software; Field-programmable gate array","authors":[{"name":"A. Habibi","is_ca":true},{"name":"Sofiène Tahar","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.03567468190291152,"gpt":0.2447658100817937,"spread":0.2090911281788822,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.003255526,0.0008885501,0.0006569251,0.001071568,0.0007944635,0.002898653,0.002154078,0.001700863,0.003641918],"category_scores_gemma":[0.007809076,0.000892829,0.001800198,0.0008135716,0.001854177,0.001918617,0.001490897,0.001826145,0.001040661],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.002272593,"about_ca_system_score_gemma":0.005322651,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.008644603,"about_ca_topic_score_gemma":0.007363995,"domain_scores_codex":[0.994852,0.001235169,0.0004921349,0.0006053044,0.002376411,0.0004388864],"domain_scores_gemma":[0.9938723,0.002047809,0.0005089955,0.001802181,0.001664417,0.000104355],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"simulation_or_modeling","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.0002404863,0.0001728968,0.00489674,0.0008472055,0.0001674846,0.00106494,0.0006875906,0.6556104,0.04608613,0.2241593,0.003824648,0.06224218],"study_design_scores_gemma":[0.00006179469,0.0001087251,0.0003502863,0.00005923946,0.00005778605,0.0001450452,0.00004338662,0.9379908,0.03267204,0.01490527,0.01357316,0.00003236895],"study_design_candidate":"simulation_or_modeling","study_design_consensus":"simulation_or_modeling","genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.0242197,0.0001317345,0.9657142,0.0002311715,0.00004536924,0.0004041195,0.0005175497,0.00433803,0.004398046],"genre_scores_gemma":[0.392246,0.0002657995,0.5999899,0.0002156994,0.00003492034,0.001337136,0.001358838,0.000742577,0.003809096],"genre_candidate":"empirical","genre_consensus":null,"teacher_disagreement_score":0.008644603,"threshold_uncertainty_score":0.0172171,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2100410948","doi":"10.1109/date.2005.112","title":"Design for Verification of SystemC Transaction Level Models","year":2005,"lang":"en","type":"article","venue":"Design, Automation, and Test in Europe","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":68,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"Concordia University","funders":"","keywords":"SystemC; Computer science; Transaction-level modeling; Electronic system-level design and verification; Correctness; Formal verification; Unified Modeling Language; Design flow; Abstract state machines; Programming language; Computer architecture; Functional verification; High-level synthesis; Embedded system; Model checking; Intelligent verification; Finite-state machine; Software; Field-programmable gate array; Software system","authors":[{"name":"A. Habibi","is_ca":true},{"name":"S. Tahar","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.08664101634549055,"gpt":0.270620713554104,"spread":0.1839796972086135,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.004422374,0.0009990366,0.0007081311,0.000975878,0.0007785537,0.003147913,0.001855221,0.001565529,0.008049753],"category_scores_gemma":[0.01085565,0.0009886788,0.001705102,0.0007757568,0.001563594,0.002023482,0.001624209,0.001993245,0.002070611],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.002225713,"about_ca_system_score_gemma":0.00480462,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.005191426,"about_ca_topic_score_gemma":0.004466821,"domain_scores_codex":[0.9938629,0.001855317,0.0006891508,0.0006731221,0.002464465,0.0004550437],"domain_scores_gemma":[0.9934899,0.002064331,0.0005198449,0.00210596,0.001725061,0.00009493868],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"theoretical_or_conceptual","study_design_gemma":"not_applicable","study_design_scores_codex":[0.0003745592,0.0002476421,0.004219458,0.001719322,0.0002168132,0.001061321,0.0009932668,0.3332739,0.04758789,0.4717811,0.01371766,0.1248071],"study_design_scores_gemma":[0.000170568,0.0001790878,0.000515281,0.0001877463,0.0001041675,0.0002937736,0.00007767578,0.8321024,0.05474408,0.04518824,0.06637941,0.00005757376],"study_design_candidate":"not_applicable","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"methods","genre_scores_codex":[0.00715699,0.00009585503,0.9816946,0.0002360741,0.00004632754,0.0004606804,0.0005214429,0.00542648,0.00436153],"genre_scores_gemma":[0.2150535,0.0002722974,0.7739658,0.0003170769,0.00004810504,0.002454153,0.001998871,0.001208015,0.004682254],"genre_candidate":"methods","genre_consensus":"methods","teacher_disagreement_score":0.008049753,"threshold_uncertainty_score":0.02692914,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2157855196","doi":"10.1109/tcad.2006.887921","title":"Exploration and Customization of FPGA-Based Soft Processors","year":2007,"lang":"en","type":"article","venue":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":66,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Toronto","funders":"","keywords":"Computer science; Field-programmable gate array; Microarchitecture; Personalization; Embedded system; Computer architecture; Set (abstract data type); Implementation; Scheme (mathematics); Processor design; Nios II; Parallel computing","authors":[{"name":"Peter Yiannacouras","is_ca":true},{"name":"J. Gregory Steffan","is_ca":true},{"name":"Jonathan Rose","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.04017209727223339,"gpt":0.2543962330251981,"spread":0.2142241357529647,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0002990439,0.0003676598,0.0001697968,0.0004534096,0.0001659076,0.0004511857,0.000582423,0.0001943938,0.001407722],"category_scores_gemma":[0.001561476,0.000233553,0.000166091,0.0002826365,0.0002131949,0.0005580053,0.0003521857,0.0003173508,0.0002135126],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0002665328,"about_ca_system_score_gemma":0.000327032,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.0003205317,"about_ca_topic_score_gemma":0.0008358788,"domain_scores_codex":[0.9996753,0.00007288003,0.00002164602,0.00005027545,0.0001338932,0.00004588804],"domain_scores_gemma":[0.9991947,0.0003416064,0.0001586572,0.0001757436,0.0001020135,0.00002734294],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"simulation_or_modeling","study_design_gemma":"bench_or_experimental","study_design_scores_codex":[0.000366567,0.000130373,0.00728367,0.0002295409,0.0000443582,0.0005220106,0.0001743035,0.3610402,0.2982488,0.01129973,0.001209813,0.3194506],"study_design_scores_gemma":[0.00005135011,0.0005270999,0.004653566,0.00003725781,0.00005601158,0.0003824522,0.00012101,0.7935232,0.1868037,0.006773731,0.007040561,0.0000299893],"study_design_candidate":"bench_or_experimental","study_design_consensus":null,"genre_codex":"empirical","genre_gemma":"empirical","genre_scores_codex":[0.7772534,0.0004402558,0.2089922,0.0002009454,0.00003698425,0.00008559348,0.00007816807,0.001372245,0.01154016],"genre_scores_gemma":[0.94142,0.0001392753,0.05696921,0.00004872846,0.000007840837,0.0000360367,0.00004866586,0.00009101279,0.001239352],"genre_candidate":"empirical","genre_consensus":"empirical","teacher_disagreement_score":0.001407722,"threshold_uncertainty_score":0.004709244,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W1994777880","doi":"10.1109/4.881197","title":"The first IA-64 microprocessor","year":2000,"lang":"en","type":"article","venue":"IEEE Journal of Solid-State Circuits","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":66,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":false,"ca_fund":true,"ca_venue":false,"about_ca":false},"ca_institutions":"","funders":"Ministère de l'Économie, de la Science et de l'Innovation - Québec; Intel Corporation","keywords":"Microprocessor; Computer science; EPIC; CMOS; Chip; Embedded system; Multi-core processor; Instruction set; Cache; Software; Computer hardware; Grid; Block (permutation group theory); Parallel computing; Computer architecture; Operating system; Electrical engineering; Engineering; Telecommunications","authors":[{"name":"Stefan Rusu","is_ca":false},{"name":"G. Singer","is_ca":false}],"retraction":null,"screen_n_in":null,"score":{"opus":0.01572921232558784,"gpt":0.2733549532971484,"spread":0.2576257409715606,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0002459726,0.0004844181,0.0003077868,0.0005462046,0.0003723124,0.0007121755,0.0007414921,0.000477506,0.007135536],"category_scores_gemma":[0.0009655139,0.0002879111,0.0003148798,0.0005317261,0.0003088836,0.0006782658,0.0007836508,0.0007889155,0.002726116],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0008059323,"about_ca_system_score_gemma":0.001059043,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.001106799,"about_ca_topic_score_gemma":0.001108492,"domain_scores_codex":[0.9997378,0.00002842044,0.00001855897,0.00006097685,0.00006771302,0.00008645781],"domain_scores_gemma":[0.9994678,0.00003142781,0.00002348554,0.00008431287,0.0003153306,0.00007764895],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"design_other","study_design_gemma":"bench_or_experimental","study_design_scores_codex":[0.001559344,0.0002450761,0.004968558,0.0004425926,0.00007975671,0.0005877883,0.00040318,0.01050935,0.1632868,0.04320822,0.0441134,0.7305959],"study_design_scores_gemma":[0.0002018382,0.00240768,0.009350576,0.0002723234,0.0001237091,0.001004684,0.0001141948,0.0459821,0.1748189,0.01067139,0.7549211,0.0001314711],"study_design_candidate":"bench_or_experimental","study_design_consensus":null,"genre_codex":"empirical","genre_gemma":"empirical","genre_scores_codex":[0.5339555,0.01199546,0.2335095,0.002579628,0.002837447,0.0008953338,0.001586761,0.01753438,0.1951061],"genre_scores_gemma":[0.7545518,0.00169692,0.1257304,0.0006518941,0.0002553139,0.0002726587,0.001661999,0.0002907403,0.1148883],"genre_candidate":"empirical","genre_consensus":"empirical","teacher_disagreement_score":0.007135536,"threshold_uncertainty_score":0.02387077,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2009541799","doi":"10.1109/fpl.2014.6927496","title":"Source-level debugging for FPGA high-level synthesis","year":2014,"lang":"en","type":"article","venue":"","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":61,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":true,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Toronto","funders":"Natural Sciences and Engineering Research Council of Canada","keywords":"Debugging; Field-programmable gate array; Computer science; High-level synthesis; Embedded system; Software; Algorithmic program debugging; Source code; Computer architecture; Computer hardware; Programming language","authors":[{"name":"Nazanin Calagar","is_ca":true},{"name":"Stephen D. Brown","is_ca":true},{"name":"Jason H. Anderson","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.05718946099388126,"gpt":0.2594504170046196,"spread":0.2022609560107383,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.00260955,0.001109273,0.0006312879,0.001378067,0.0005395311,0.001903673,0.002433509,0.0009587877,0.007393896],"category_scores_gemma":[0.008213678,0.0007480825,0.0007797647,0.0006275037,0.001156676,0.001860314,0.001352306,0.001871918,0.001851895],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.001277683,"about_ca_system_score_gemma":0.00184111,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.002497193,"about_ca_topic_score_gemma":0.002638001,"domain_scores_codex":[0.9973762,0.0007762659,0.0001867792,0.0002481431,0.001196193,0.0002164483],"domain_scores_gemma":[0.9966071,0.001407121,0.0002583668,0.0008533651,0.0007839929,0.00009010833],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"design_other","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.000598189,0.0002150943,0.003666652,0.001224965,0.0001447855,0.0009936115,0.0008827602,0.1934016,0.052318,0.2282468,0.02662796,0.4916796],"study_design_scores_gemma":[0.0001809449,0.00022294,0.0006147259,0.0003599586,0.00007608435,0.0007601755,0.00009561745,0.6942196,0.1275472,0.07904299,0.09675849,0.0001213553],"study_design_candidate":"simulation_or_modeling","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"methods","genre_scores_codex":[0.001834672,0.0001331395,0.981755,0.00007016144,0.00002718233,0.00004498042,0.0001019955,0.0145376,0.001495318],"genre_scores_gemma":[0.1526965,0.0002873587,0.8399535,0.0001733088,0.00004990408,0.0001558944,0.0005566714,0.00379652,0.00233041],"genre_candidate":"methods","genre_consensus":"methods","teacher_disagreement_score":0.007393896,"threshold_uncertainty_score":0.02473503,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2108424055","doi":"10.1145/968280.968308","title":"Using reconfigurability to achieve real-time profiling for hardware/software codesign","year":2004,"lang":"en","type":"article","venue":"","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":60,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":true,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Toronto","funders":"Government of Ontario","keywords":"Reconfigurability; Profiling (computer programming); Computer science; Field-programmable gate array; Embedded system; Software; Computer architecture; Reconfigurable computing; System on a chip; Computer hardware; Operating system","authors":[{"name":"Lesley Shannon","is_ca":true},{"name":"Paul Chow","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.06832273468868369,"gpt":0.3218016446951693,"spread":0.2534789100064856,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0005237365,0.0006152111,0.000216787,0.0008935168,0.0002524104,0.0006030989,0.0006214695,0.0003253865,0.001450447],"category_scores_gemma":[0.003299536,0.0003169429,0.0001587427,0.0003439037,0.0005080848,0.00105968,0.0004918937,0.0007069272,0.0006564144],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0003253502,"about_ca_system_score_gemma":0.0002956525,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.0002473751,"about_ca_topic_score_gemma":0.0006340324,"domain_scores_codex":[0.9993209,0.0001717414,0.00004841339,0.0001033721,0.000290852,0.00006480126],"domain_scores_gemma":[0.9980831,0.0005585731,0.0002684543,0.0007981809,0.0002235439,0.00006819042],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"design_other","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.0004484906,0.0000866573,0.002107233,0.0001510081,0.00003240912,0.0005015285,0.0005613639,0.03613111,0.4116193,0.0168782,0.002355467,0.5291272],"study_design_scores_gemma":[0.00003858644,0.0003636036,0.002342158,0.00005821092,0.00003179703,0.001361352,0.0000764729,0.2207597,0.7328521,0.009000202,0.03303109,0.00008464987],"study_design_candidate":"simulation_or_modeling","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"methods","genre_scores_codex":[0.06804194,0.0003118463,0.9153073,0.0001384575,0.00007958829,0.00006275139,0.00003511404,0.009191982,0.006830855],"genre_scores_gemma":[0.6599268,0.0002175785,0.3348293,0.000135136,0.00002868,0.00007968499,0.00008545609,0.001004311,0.003692978],"genre_candidate":"methods","genre_consensus":"methods","teacher_disagreement_score":0.001450447,"threshold_uncertainty_score":0.004852235,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2165055337","doi":"10.1109/fccm.2006.71","title":"Virtual Embedded Blocks: A Methodology for Evaluating Embedded Elements in FPGAs","year":2006,"lang":"en","type":"article","venue":"","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":58,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of British Columbia","funders":"","keywords":"Field-programmable gate array; Retiming; Computer science; Embedded system; Block (permutation group theory); Routing (electronic design automation); Design flow; Logic block; FPGA prototype; Computer architecture; Computer hardware; Parallel computing","authors":[{"name":"C.H. Ho","is_ca":false},{"name":"Philip H. W. Leong","is_ca":false},{"name":"Wayne Luk","is_ca":false},{"name":"Steven J. E. Wilton","is_ca":true},{"name":"Sergio López-Buedo","is_ca":false}],"retraction":null,"screen_n_in":null,"score":{"opus":0.1082639515791821,"gpt":0.3906616694851804,"spread":0.2823977179059983,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.001598448,0.001025533,0.0004765222,0.001379613,0.0002887289,0.0009972274,0.001205493,0.0005118559,0.003976196],"category_scores_gemma":[0.004420516,0.0003538931,0.0003965875,0.0009191595,0.0006169504,0.001036203,0.0005946916,0.0005357652,0.0005180642],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0004760814,"about_ca_system_score_gemma":0.0007041714,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.0008517936,"about_ca_topic_score_gemma":0.001070249,"domain_scores_codex":[0.9989151,0.000337742,0.00007877358,0.00007705746,0.0005229315,0.00006842818],"domain_scores_gemma":[0.9982117,0.0008126474,0.000249302,0.0002470904,0.0004386178,0.00004056438],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"simulation_or_modeling","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.0003109212,0.0001318095,0.004127675,0.001041013,0.000146977,0.0003435495,0.0002406484,0.4259275,0.06943969,0.09640578,0.002904052,0.3989805],"study_design_scores_gemma":[0.0001019674,0.001029258,0.001588932,0.0001551313,0.0001167135,0.0005665664,0.0001202719,0.8424616,0.09637318,0.02943882,0.02797189,0.00007564809],"study_design_candidate":"simulation_or_modeling","study_design_consensus":"simulation_or_modeling","genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.01355144,0.0001908156,0.9823171,0.00001746773,0.00002908296,0.000157936,0.0000974718,0.0009591411,0.002679631],"genre_scores_gemma":[0.1265054,0.0002096564,0.8708887,0.00002391734,0.00001273138,0.0003424278,0.000154937,0.0002061406,0.001656131],"genre_candidate":"empirical","genre_consensus":null,"teacher_disagreement_score":0.003976196,"threshold_uncertainty_score":0.01330173,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W1965732719","doi":"10.1109/rtas.2014.6926012","title":"The ROSACE case study: From Simulink specification to multi/many-core execution","year":2014,"lang":"en","type":"article","venue":"","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":58,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"Polytechnique Montréal","funders":"","keywords":"Avionics; Computer science; License; Controller (irrigation); MATLAB; Open source; Core (optical fiber); Software engineering; Baseline (sea); Control (management); Control engineering; Embedded system; Systems engineering; Software; Operating system; Engineering","authors":[{"name":"Claire Pagetti","is_ca":false},{"name":"David Saussié","is_ca":true},{"name":"Romain Gratia","is_ca":false},{"name":"Éric Noulard","is_ca":false},{"name":"Pierre Siron","is_ca":false}],"retraction":null,"screen_n_in":null,"score":{"opus":0.06075758093606891,"gpt":0.3189001624707914,"spread":0.2581425815347225,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.001833204,0.0006589442,0.0002901802,0.0004587581,0.0007672536,0.001517079,0.001261298,0.001502972,0.004654777],"category_scores_gemma":[0.004656029,0.0003162487,0.0004758493,0.0004775299,0.001042688,0.001298056,0.001187455,0.001529694,0.0007139144],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0007806162,"about_ca_system_score_gemma":0.001234786,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.005055425,"about_ca_topic_score_gemma":0.005625478,"domain_scores_codex":[0.9975406,0.0008682189,0.0001232463,0.0002736974,0.0008977021,0.0002965629],"domain_scores_gemma":[0.9973956,0.001523455,0.0001498409,0.0003661109,0.0004097824,0.0001552903],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"simulation_or_modeling","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.001833089,0.001755829,0.01851683,0.00292481,0.0001890584,0.03938835,0.01028039,0.4296984,0.07423143,0.1603653,0.03066219,0.2301543],"study_design_scores_gemma":[0.0006176095,0.001709173,0.00752794,0.0006196178,0.0001531069,0.009596109,0.008912795,0.4376093,0.1601389,0.03651444,0.3364268,0.0001741837],"study_design_candidate":"simulation_or_modeling","study_design_consensus":"simulation_or_modeling","genre_codex":"empirical","genre_gemma":"empirical","genre_scores_codex":[0.6274027,0.0008359426,0.3002392,0.00209485,0.0002486071,0.0008604704,0.001683117,0.003331573,0.0633035],"genre_scores_gemma":[0.831429,0.0005095223,0.150151,0.0003734135,0.00002577858,0.0003682815,0.001263711,0.0007383786,0.01514091],"genre_candidate":"empirical","genre_consensus":"empirical","teacher_disagreement_score":0.005055425,"threshold_uncertainty_score":0.01557171,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2104193487","doi":"10.1109/tc.2009.173","title":"Algorithmic Aspects of Hardware/Software Partitioning: 1D Search Algorithms","year":2009,"lang":"en","type":"article","venue":"IEEE Transactions on Computers","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":58,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"Nortel (Canada)","funders":"","keywords":"Algorithm; Computer science; Knapsack problem; Heuristic; Software; Combinatorics; Theoretical computer science; Mathematics; Artificial intelligence; Programming language","authors":[{"name":"Jigang Wu","is_ca":false},{"name":"Thambipillai Srikanthan","is_ca":false},{"name":"Guang Chen","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.02679554778028945,"gpt":0.2722061593095307,"spread":0.2454106115292413,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.001097966,0.001169974,0.001108753,0.001404729,0.0009863761,0.002036083,0.001552293,0.001666942,0.006168612],"category_scores_gemma":[0.003900023,0.0009835637,0.00119031,0.002005807,0.001231599,0.002526495,0.001891395,0.001546422,0.001508806],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0014209,"about_ca_system_score_gemma":0.001555741,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.004253997,"about_ca_topic_score_gemma":0.005866031,"domain_scores_codex":[0.9989439,0.0003521749,0.00006256119,0.000216606,0.0003223965,0.0001025166],"domain_scores_gemma":[0.998698,0.0008612726,0.0001073867,0.000162024,0.0001367375,0.00003446349],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"simulation_or_modeling","study_design_gemma":"theoretical_or_conceptual","study_design_scores_codex":[0.0001115617,0.00008947396,0.0009250854,0.0004222466,0.00005884321,0.00009064536,0.0002110086,0.6487283,0.004081752,0.08825774,0.00652174,0.2505016],"study_design_scores_gemma":[0.00004128035,0.0000429459,0.0002691407,0.00004174007,0.00001879396,0.0001167044,0.00005241478,0.934523,0.001198231,0.05668029,0.006995653,0.00001978988],"study_design_candidate":"theoretical_or_conceptual","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"methods","genre_scores_codex":[0.006842067,0.0008802983,0.9842233,0.0003877624,0.00005288998,0.00007560939,0.00008535061,0.000417357,0.007035492],"genre_scores_gemma":[0.1103548,0.001302453,0.8827479,0.0002549652,0.00008812101,0.0003371401,0.0004823465,0.0002655245,0.004166652],"genre_candidate":"methods","genre_consensus":"methods","teacher_disagreement_score":0.006168612,"threshold_uncertainty_score":0.02063602,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2004250488","doi":"10.1109/fccm.2013.50","title":"The Effect of Compiler Optimizations on High-Level Synthesis for FPGAs","year":2013,"lang":"en","type":"article","venue":"","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":53,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":true,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Toronto","funders":"Natural Sciences and Engineering Research Council of Canada; University of California, Riverside","keywords":"Compiler; Computer science; Undo; Field-programmable gate array; Optimizing compiler; Parallel computing; High-level synthesis; Interprocedural optimization; Profiling (computer programming); Loop optimization; Embedded system; Operating system","authors":[{"name":"Qijing Huang","is_ca":true},{"name":"Ruolong Lian","is_ca":true},{"name":"Andrew Canis","is_ca":true},{"name":"Jongsok Choi","is_ca":true},{"name":"Ryan Xi","is_ca":true},{"name":"Stephen D. Brown","is_ca":true},{"name":"Jason H. Anderson","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.01904491038835521,"gpt":0.2510605822297518,"spread":0.2320156718413966,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.001298414,0.0008681241,0.0003777908,0.0005932262,0.0003111873,0.0006369778,0.0004947727,0.0003636461,0.001072909],"category_scores_gemma":[0.006686457,0.000278913,0.0003487133,0.000609379,0.0004413602,0.0008396919,0.000302965,0.0004362976,0.0001584326],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0007876442,"about_ca_system_score_gemma":0.000739573,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.001979789,"about_ca_topic_score_gemma":0.004265147,"domain_scores_codex":[0.9984308,0.0004996654,0.0001228758,0.0001275226,0.0005706826,0.00024851],"domain_scores_gemma":[0.9931384,0.004572718,0.000891582,0.0007465412,0.0005760011,0.0000747308],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"simulation_or_modeling","study_design_gemma":"bench_or_experimental","study_design_scores_codex":[0.0007478062,0.0001999126,0.009280723,0.0002583555,0.0001232377,0.0001476278,0.00007579351,0.8191234,0.08357187,0.0009610968,0.0006399867,0.08487023],"study_design_scores_gemma":[0.00007004529,0.001430379,0.005833404,0.00002081799,0.0001093749,0.00008436755,0.00004011353,0.825189,0.1655757,0.0007639661,0.000854944,0.00002789793],"study_design_candidate":"bench_or_experimental","study_design_consensus":null,"genre_codex":"empirical","genre_gemma":"empirical","genre_scores_codex":[0.9470334,0.0008976653,0.04722723,0.000144847,0.00004584517,0.0000503638,0.0001435515,0.001795739,0.002661323],"genre_scores_gemma":[0.9709585,0.0001169018,0.02841313,0.00004192692,0.00001181008,0.00001598485,0.00007621059,0.0001393813,0.0002261271],"genre_candidate":"empirical","genre_consensus":"empirical","teacher_disagreement_score":0.001979789,"threshold_uncertainty_score":0.006866753,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2134931573","doi":"10.1145/2145694.2145712","title":"Impact of FPGA architecture on resource sharing in high-level synthesis","year":2012,"lang":"en","type":"article","venue":"","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":52,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"Alterra Power (Canada); University of Toronto","funders":"","keywords":"Field-programmable gate array; Stratix; Computer science; High-level synthesis; Shared resource; Architecture; Key (lock); Computer architecture; Embedded system; Computer network; Operating system","authors":[{"name":"Stefan Hadjis","is_ca":true},{"name":"Andrew Canis","is_ca":true},{"name":"Jason H. Anderson","is_ca":true},{"name":"Jongsok Choi","is_ca":true},{"name":"Kevin Nam","is_ca":true},{"name":"Stephen D. Brown","is_ca":true},{"name":"Tomasz Czajkowski","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.04306472320038372,"gpt":0.2921003759540239,"spread":0.2490356527536402,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.001505399,0.0004711662,0.0002435782,0.0004791157,0.0003530767,0.000861652,0.0007361808,0.0002937036,0.002384925],"category_scores_gemma":[0.005633419,0.00023601,0.0003032066,0.0006033893,0.0004607337,0.001357251,0.000652992,0.0004638227,0.0002430646],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0008750248,"about_ca_system_score_gemma":0.0008925611,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.00117841,"about_ca_topic_score_gemma":0.002021625,"domain_scores_codex":[0.9981593,0.0007872724,0.0001088759,0.0001282,0.0005173993,0.0002988989],"domain_scores_gemma":[0.9947246,0.003439996,0.000582443,0.0008129675,0.0003477948,0.00009218754],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"simulation_or_modeling","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.0009122015,0.0001618006,0.008794805,0.0002141892,0.00007331516,0.000599578,0.00009943268,0.7821744,0.06699405,0.01480147,0.0006467311,0.124528],"study_design_scores_gemma":[0.0001293631,0.00171952,0.007614569,0.00006578676,0.0002158275,0.0006698396,0.0001683927,0.8430547,0.1299706,0.01185047,0.00450361,0.00003733013],"study_design_candidate":"simulation_or_modeling","study_design_consensus":"simulation_or_modeling","genre_codex":"empirical","genre_gemma":"methods","genre_scores_codex":[0.901465,0.0006840376,0.07765006,0.0003610944,0.00004425305,0.00006938068,0.0000792892,0.0005171178,0.01912968],"genre_scores_gemma":[0.9826313,0.00009763874,0.01658393,0.00003982687,0.000007487874,0.00001465989,0.00002663136,0.00003861419,0.0005600307],"genre_candidate":"methods","genre_consensus":null,"teacher_disagreement_score":0.002384925,"threshold_uncertainty_score":0.00797838,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2072367650","doi":"10.1109/fpl.2014.6927498","title":"Effective FPGA debug for high-level synthesis generated circuits","year":2014,"lang":"en","type":"article","venue":"","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":49,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of British Columbia","funders":"","keywords":"Debugging; Field-programmable gate array; Computer science; High-level synthesis; Embedded system; Software; Background debug mode interface; Computer architecture; Source code; Time to market; Code (set theory); Operating system; Programming language; Set (abstract data type)","authors":[{"name":"Jeffrey Goeders","is_ca":true},{"name":"Steven J. E. Wilton","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.02861649710753675,"gpt":0.2523303526592199,"spread":0.2237138555516832,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.001196564,0.000846917,0.0003598742,0.0009823027,0.0004875268,0.001255569,0.0007157057,0.0006374888,0.008158702],"category_scores_gemma":[0.00688147,0.0004277067,0.0002619415,0.0003402715,0.0005869628,0.001636471,0.000932412,0.0007764247,0.001389388],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0007981528,"about_ca_system_score_gemma":0.001028089,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.0006654251,"about_ca_topic_score_gemma":0.001515611,"domain_scores_codex":[0.9987139,0.0004668454,0.00007095888,0.0001398134,0.0004929319,0.0001157077],"domain_scores_gemma":[0.9972053,0.00155481,0.0001856946,0.0007135807,0.0002913056,0.00004929443],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"design_other","study_design_gemma":"bench_or_experimental","study_design_scores_codex":[0.001371428,0.000157425,0.004210298,0.0006370315,0.00006839132,0.0007453283,0.0005181764,0.1596652,0.07201042,0.06852753,0.01313514,0.6789536],"study_design_scores_gemma":[0.0002897677,0.000568993,0.001127542,0.0002777868,0.00005936455,0.0008122126,0.0001878557,0.6813454,0.2205282,0.04212271,0.05262724,0.00005285272],"study_design_candidate":"bench_or_experimental","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"methods","genre_scores_codex":[0.05793232,0.001041292,0.9138641,0.0003973128,0.0001853504,0.0001141253,0.000185708,0.01488464,0.01139509],"genre_scores_gemma":[0.7345502,0.0004553157,0.2575677,0.0002302985,0.00004528272,0.00009284892,0.0003339542,0.001031034,0.005693282],"genre_candidate":"methods","genre_consensus":"methods","teacher_disagreement_score":0.008158702,"threshold_uncertainty_score":0.02729362,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2809276277","doi":"10.1145/3195970.3195986","title":"An architecture-agnostic integer linear programming approach to CGRA mapping","year":2018,"lang":"en","type":"article","venue":"","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":49,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Toronto","funders":"","keywords":"Computer science; Computer architecture; Architecture; Integer programming; Parallel computing; Integer (computer science); Linear programming; Set (abstract data type); Programming language; Algorithm","authors":[{"name":"S. Alexander Chin","is_ca":true},{"name":"Jason H. Anderson","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.03139286431662249,"gpt":0.2867129454956667,"spread":0.2553200811790442,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.000707955,0.0008080589,0.0003745825,0.0004513868,0.0003506045,0.0008271316,0.001070492,0.0005504356,0.003466918],"category_scores_gemma":[0.001956175,0.0003102761,0.0005996879,0.0004355286,0.0004814296,0.0008836843,0.0009495748,0.001545442,0.0005643882],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0004801169,"about_ca_system_score_gemma":0.0009106616,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.001021599,"about_ca_topic_score_gemma":0.002165551,"domain_scores_codex":[0.9994162,0.0002061673,0.0000233044,0.00008485834,0.0001914595,0.00007790916],"domain_scores_gemma":[0.9993414,0.0003629059,0.00005877161,0.00009989477,0.0001068485,0.00003012376],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"simulation_or_modeling","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.000118283,0.0001595035,0.000546938,0.0001467449,0.0000326317,0.0001320483,0.00009947328,0.7728791,0.01844603,0.03851699,0.002829846,0.1660924],"study_design_scores_gemma":[0.00001178291,0.00003716373,0.00004295191,0.00000574018,0.000006204188,0.00002803107,0.00001277852,0.9854245,0.003345856,0.009383304,0.00169717,0.000004649994],"study_design_candidate":"simulation_or_modeling","study_design_consensus":"simulation_or_modeling","genre_codex":"methods","genre_gemma":"methods","genre_scores_codex":[0.00920404,0.00008386098,0.9847008,0.0001262449,0.00002731449,0.00004722753,0.00003393325,0.0009846785,0.004791845],"genre_scores_gemma":[0.252548,0.0001227234,0.7433212,0.0001748017,0.0000370583,0.0001635432,0.0001545061,0.0003679448,0.003110116],"genre_candidate":"methods","genre_consensus":"methods","teacher_disagreement_score":0.003466918,"threshold_uncertainty_score":0.01159793,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2048031428","doi":"10.1109/aspdac.2012.6164991","title":"Parallel simulation of mixed-abstraction SystemC models on GPUs and multicore CPUs","year":2012,"lang":"en","type":"article","venue":"","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":47,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Waterloo","funders":"","keywords":"SystemC; Computer science; Parallel computing; Multi-core processor; Kernel (algebra); Abstraction; Partition (number theory); Graphics; CUDA; General-purpose computing on graphics processing units; Computer architecture; Speedup; Embedded system; Operating system","authors":[{"name":"Rohit Sinha","is_ca":true},{"name":"Aayush Prakash","is_ca":true},{"name":"Hiren Patel","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.0554512750690891,"gpt":0.2942509196386638,"spread":0.2387996445695748,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0006195566,0.0006841338,0.0008005671,0.0004866973,0.0007476018,0.001078287,0.001406742,0.0009224794,0.002096995],"category_scores_gemma":[0.002154644,0.0005960339,0.0008902535,0.0006571343,0.001049652,0.001050577,0.001511381,0.001028511,0.0002216276],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.001537446,"about_ca_system_score_gemma":0.001946017,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.01353025,"about_ca_topic_score_gemma":0.009312762,"domain_scores_codex":[0.9993768,0.0001738858,0.00002961486,0.00006992067,0.0002502108,0.00009950561],"domain_scores_gemma":[0.9991469,0.0003559913,0.00007630522,0.0001784106,0.0001583568,0.00008384503],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"simulation_or_modeling","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.00006094273,0.00003952951,0.001540485,0.00002445452,0.00002695079,0.00008140648,0.00008379034,0.9838488,0.004177614,0.006342356,0.0002619451,0.003511629],"study_design_scores_gemma":[0.000008593143,0.00001245894,0.00009710122,0.000001482003,0.000003071609,0.000006533927,0.00000803247,0.9980136,0.0009343282,0.0006439239,0.0002681999,0.00000268315],"study_design_candidate":"simulation_or_modeling","study_design_consensus":"simulation_or_modeling","genre_codex":"empirical","genre_gemma":"empirical","genre_scores_codex":[0.5553578,0.000169042,0.4286642,0.0003532894,0.00007752243,0.0001505767,0.0002036205,0.001987145,0.01303672],"genre_scores_gemma":[0.9080746,0.00007289676,0.08923292,0.00005067487,0.000008542012,0.0001392935,0.0001763349,0.0001790343,0.002065737],"genre_candidate":"empirical","genre_consensus":"empirical","teacher_disagreement_score":0.01353025,"threshold_uncertainty_score":0.02690297,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W1657896522","doi":"10.5555/2685048.2685101","title":"User-guided device driver synthesis","year":2014,"lang":"en","type":"article","venue":"Operating Systems Design and Implementation","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":47,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Toronto","funders":"","keywords":"Debugging; Computer science; Flexibility (engineering); Automation; Abstraction; Embedded system; High-level synthesis; Software engineering; Programming language; Engineering; Field-programmable gate array","authors":[{"name":"Leonid Ryzhyk","is_ca":false},{"name":"Adam K. Walker","is_ca":false},{"name":"John Keys","is_ca":false},{"name":"Alexander Legg","is_ca":false},{"name":"Arun Raghunath","is_ca":false},{"name":"Michael Stumm","is_ca":true},{"name":"Mona Vij","is_ca":false}],"retraction":null,"screen_n_in":null,"score":{"opus":0.03934264712630248,"gpt":0.3200072981216438,"spread":0.2806646509953413,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.001256056,0.0008973185,0.0004291846,0.0005680204,0.0003793601,0.001210975,0.001164804,0.000636475,0.01001715],"category_scores_gemma":[0.00412106,0.0005432402,0.0005209193,0.0002446201,0.0004527917,0.001226294,0.001213575,0.0009726148,0.002379727],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0003955175,"about_ca_system_score_gemma":0.0009178695,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.0004956982,"about_ca_topic_score_gemma":0.001204926,"domain_scores_codex":[0.9988089,0.0002888608,0.0000879495,0.0002018596,0.0004879431,0.0001245335],"domain_scores_gemma":[0.997813,0.001074363,0.00008145682,0.0005134661,0.0004657278,0.00005194278],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"design_other","study_design_gemma":"bench_or_experimental","study_design_scores_codex":[0.0007713246,0.0002319877,0.003965406,0.0008725532,0.0001029082,0.0006918709,0.001281564,0.07139985,0.300956,0.06490843,0.02762913,0.527189],"study_design_scores_gemma":[0.0002181726,0.0004409208,0.00113541,0.00009919863,0.00007364213,0.0009070053,0.0002568944,0.4825753,0.3216698,0.03259475,0.159912,0.000116824],"study_design_candidate":"bench_or_experimental","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.02638583,0.0001150652,0.9421353,0.000105292,0.00006235993,0.0001480631,0.0004181421,0.01998513,0.01064483],"genre_scores_gemma":[0.3889209,0.000170029,0.5914741,0.0001903781,0.00002275925,0.0003270686,0.001167512,0.004972959,0.0127544],"genre_candidate":"empirical","genre_consensus":null,"teacher_disagreement_score":0.01001715,"threshold_uncertainty_score":0.03351074,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2168010321","doi":"10.1109/icec.1998.699505","title":"High-level synthesis of digital circuits using genetic algorithms","year":2002,"lang":"en","type":"article","venue":"","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":47,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"Carleton University","funders":"","keywords":"Computer science; High-level synthesis; Scheduling (production processes); Integer programming; Latency (audio); Digital electronics; Genetic algorithm; Algorithm; Linear programming; Parallel computing; Processor scheduling; Electronic circuit; Mathematical optimization; Field-programmable gate array; Computer hardware; Mathematics; Engineering","authors":[{"name":"E. Torbey","is_ca":true},{"name":"J.P. Knight","is_ca":false}],"retraction":null,"screen_n_in":null,"score":{"opus":0.07623768902413831,"gpt":0.2537030904768477,"spread":0.1774654014527094,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0003447288,0.0007364264,0.0004245322,0.0007343479,0.0003760988,0.0008798062,0.0007020449,0.0009304468,0.002829688],"category_scores_gemma":[0.0006579352,0.0003991142,0.000753946,0.0007514209,0.0006046045,0.000513141,0.0003266475,0.0008015365,0.001526958],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0004722556,"about_ca_system_score_gemma":0.0006312823,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.001268847,"about_ca_topic_score_gemma":0.002034669,"domain_scores_codex":[0.9997621,0.0000511495,0.00001723063,0.0000333217,0.0001072183,0.00002882859],"domain_scores_gemma":[0.9998364,0.00008575746,0.00001541763,0.00003283329,0.00002338521,0.000006204149],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"simulation_or_modeling","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.00006913247,0.00009439182,0.0004944486,0.00052072,0.00012072,0.0004679002,0.0001682031,0.4342383,0.06697895,0.1295094,0.005240936,0.3620969],"study_design_scores_gemma":[0.00007436369,0.000205993,0.0003749245,0.0001250784,0.00008079797,0.000585408,0.000029333,0.7825357,0.05494185,0.08382519,0.07716572,0.00005558107],"study_design_candidate":"simulation_or_modeling","study_design_consensus":"simulation_or_modeling","genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.002812069,0.0003998379,0.989026,0.00007745648,0.00005272153,0.00007292813,0.00006609281,0.001148272,0.00634459],"genre_scores_gemma":[0.05740887,0.0007983609,0.9381865,0.0001155169,0.00002499506,0.0002162339,0.0002003851,0.0001581368,0.002890902],"genre_candidate":"empirical","genre_consensus":null,"teacher_disagreement_score":0.002829688,"threshold_uncertainty_score":0.00946629,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W4243315213","doi":"10.1109/dac.2018.8465799","title":"An Architecture-Agnostic Integer Linear Programming Approach to CGRA Mapping","year":2018,"lang":"en","type":"article","venue":"2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC)","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":45,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Toronto","funders":"","keywords":"Computer science; Architecture; Computer architecture; Integer programming; Parallel computing; Integer (computer science); Set (abstract data type); Linear programming; Programming language; Algorithm","authors":[{"name":"S. Alexander Chin","is_ca":true},{"name":"Jason H. Anderson","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.09188084650747681,"gpt":0.3160060538151676,"spread":0.2241252073076908,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0007254425,0.000868491,0.0003955888,0.0004519853,0.0003589032,0.000946879,0.001106706,0.0005770084,0.003930293],"category_scores_gemma":[0.002041323,0.0003206934,0.0006292792,0.0004511149,0.0004834141,0.0009250093,0.001041553,0.001647069,0.0006669784],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0005085825,"about_ca_system_score_gemma":0.0009644057,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.001094559,"about_ca_topic_score_gemma":0.002334946,"domain_scores_codex":[0.9993703,0.0002170006,0.00002538101,0.00009450483,0.0002045921,0.00008827404],"domain_scores_gemma":[0.999324,0.0003769977,0.00005952105,0.00009658124,0.0001100995,0.00003282096],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"simulation_or_modeling","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.0001358119,0.0001722721,0.0006019039,0.0001653056,0.00003549823,0.0001522242,0.0001121958,0.7692646,0.01820235,0.04031157,0.003618235,0.167228],"study_design_scores_gemma":[0.00001305101,0.00003894688,0.00004245964,0.00000655568,0.000006381833,0.00002890414,0.00001512677,0.9848684,0.003007141,0.01012961,0.001838604,0.0000047496],"study_design_candidate":"simulation_or_modeling","study_design_consensus":"simulation_or_modeling","genre_codex":"methods","genre_gemma":"methods","genre_scores_codex":[0.009800764,0.0001068299,0.9826849,0.0001569514,0.00003355565,0.00005306123,0.00004409843,0.001216266,0.005903631],"genre_scores_gemma":[0.2653014,0.0001375719,0.7299131,0.0002139355,0.00004322942,0.0001808503,0.0001945566,0.0004577019,0.003557682],"genre_candidate":"methods","genre_consensus":"methods","teacher_disagreement_score":0.003930293,"threshold_uncertainty_score":0.01314819,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W3200826900","doi":"10.1145/3469660","title":"Programming and Synthesis for Software-defined FPGA Acceleration: Status and Future Prospects","year":2021,"lang":"en","type":"article","venue":"ACM Transactions on Reconfigurable Technology and Systems","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":45,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"Simon Fraser University","funders":"","keywords":"Computer science; Field-programmable gate array; Software; Computer architecture; Memory hierarchy; Compiler; Programming paradigm; Flexibility (engineering); Embedded system; Reconfigurable computing; Hardware acceleration; Software engineering; Parallel computing; Operating system; Programming language","authors":[{"name":"Yi‐Hsiang Lai","is_ca":false},{"name":"Ecenur Ustun","is_ca":false},{"name":"Shaojie Xiang","is_ca":false},{"name":"Zhenman Fang","is_ca":true},{"name":"Hongbo Rong","is_ca":false},{"name":"Zhiru Zhang","is_ca":false}],"retraction":null,"screen_n_in":null,"score":{"opus":0.02063966463218597,"gpt":0.248343657031963,"spread":0.227703992399777,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.001915663,0.0007308307,0.0004850312,0.0008932711,0.0003123045,0.002130663,0.001658566,0.0007781219,0.005873318],"category_scores_gemma":[0.002506709,0.0005805195,0.000711862,0.001479494,0.0009909557,0.002416253,0.0007237976,0.00166386,0.002222823],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0008284011,"about_ca_system_score_gemma":0.001433895,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.001011254,"about_ca_topic_score_gemma":0.001193427,"domain_scores_codex":[0.9992746,0.0001812073,0.0000607331,0.00009464133,0.0003077471,0.00008115355],"domain_scores_gemma":[0.9983021,0.0008916621,0.00008140003,0.0002425204,0.0003860223,0.00009619198],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"design_other","study_design_gemma":"not_applicable","study_design_scores_codex":[0.0001850617,0.0001526336,0.001245621,0.001657279,0.00004379034,0.0001020503,0.0002776918,0.04162367,0.01357208,0.1240043,0.01271899,0.804417],"study_design_scores_gemma":[0.0001165071,0.0006545919,0.001317019,0.00151205,0.00008769793,0.0005027853,0.0003539279,0.2812299,0.02483293,0.1596002,0.5296871,0.0001053761],"study_design_candidate":"not_applicable","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"review","genre_scores_codex":[0.02798518,0.1703815,0.7477013,0.007569024,0.0008683678,0.0001409427,0.0002172709,0.005138493,0.03999791],"genre_scores_gemma":[0.1272594,0.1728317,0.6833304,0.001284043,0.0008665525,0.0002193313,0.0008785039,0.001205207,0.01212488],"genre_candidate":"review","genre_consensus":null,"teacher_disagreement_score":0.005873318,"threshold_uncertainty_score":0.01964819,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2119658153","doi":"10.5555/1899721.1899753","title":"SCGPSim: a fast SystemC simulator on GPUs","year":2010,"lang":"en","type":"article","venue":"Asia and South Pacific Design Automation Conference","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":45,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Waterloo","funders":"","keywords":"SystemC; Computer science; Parallel computing; Executable; Discrete event simulation; Graphics; Speedup; CUDA; Massively parallel; General-purpose computing on graphics processing units; Model of computation; Computation; Computer architecture; Programming language; Computer graphics (images); Simulation","authors":[{"name":"Mahesh Nanjundappa","is_ca":false},{"name":"Hiren Patel","is_ca":true},{"name":"Bijoy A. Jose","is_ca":false},{"name":"Sandeep K. Shukla","is_ca":false}],"retraction":null,"screen_n_in":null,"score":{"opus":0.02560131835755412,"gpt":0.2491131778678979,"spread":0.2235118595103438,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0005535086,0.0008087499,0.0005810643,0.00057006,0.000430551,0.0007843886,0.001819166,0.0007968966,0.009864409],"category_scores_gemma":[0.002273441,0.0005703899,0.0006725817,0.0008660837,0.0005024638,0.0007535837,0.0007993589,0.001314559,0.00162188],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0008607907,"about_ca_system_score_gemma":0.001999709,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.009974346,"about_ca_topic_score_gemma":0.008435175,"domain_scores_codex":[0.9995769,0.0001050274,0.0000222797,0.00004142148,0.0002068269,0.00004758262],"domain_scores_gemma":[0.9993074,0.0002536665,0.00004498683,0.0001398709,0.0002025121,0.00005150236],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"simulation_or_modeling","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.0002786666,0.00009189115,0.0024389,0.0002522486,0.0001188001,0.000199602,0.0001778688,0.9017522,0.01250977,0.01846535,0.02256903,0.04114559],"study_design_scores_gemma":[0.00006373212,0.00003442726,0.0001535227,0.000007915423,0.000009534347,0.00002458948,0.000008424679,0.9813095,0.004434292,0.001734111,0.01220984,0.00001018249],"study_design_candidate":"simulation_or_modeling","study_design_consensus":"simulation_or_modeling","genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.09666676,0.0005086685,0.8061355,0.000570224,0.0002842653,0.0005055796,0.00455471,0.05308651,0.03768779],"genre_scores_gemma":[0.518537,0.0006312164,0.4530764,0.0002660911,0.00005116988,0.001036756,0.007263377,0.006399509,0.01273842],"genre_candidate":"empirical","genre_consensus":null,"teacher_disagreement_score":0.009974346,"threshold_uncertainty_score":0.03299975,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W1600324942","doi":"10.1109/fccm.2015.25","title":"Using Dynamic Signal-Tracing to Debug Compiler-Optimized HLS Circuits on FPGAs","year":2015,"lang":"en","type":"article","venue":"","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":44,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of British Columbia","funders":"","keywords":"Computer science; Debugging; Tracing; Compiler; Place and route; Field-programmable gate array; Embedded system; Toolchain; Parallel computing; Computer architecture; Programming language; Software","authors":[{"name":"Jeffrey Goeders","is_ca":true},{"name":"Steven J. E. Wilton","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.1046903186530795,"gpt":0.3358906502979773,"spread":0.2312003316448979,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0005551827,0.0006171503,0.0002251588,0.0007809071,0.000198607,0.0004702738,0.0006490416,0.0002820986,0.002411811],"category_scores_gemma":[0.002974795,0.0002632017,0.000232238,0.0003836565,0.0004102929,0.000692781,0.0003919399,0.0004026614,0.0003141054],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0007121341,"about_ca_system_score_gemma":0.0007292406,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.001532926,"about_ca_topic_score_gemma":0.002763255,"domain_scores_codex":[0.9995404,0.0001365601,0.00003321029,0.00007004959,0.0001606767,0.00005909781],"domain_scores_gemma":[0.998358,0.0008438201,0.0002315691,0.0003801401,0.0001508197,0.0000356668],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"design_other","study_design_gemma":"bench_or_experimental","study_design_scores_codex":[0.0007813664,0.0001546333,0.01067337,0.0003552065,0.00008611005,0.0004883242,0.0007060986,0.247345,0.2145519,0.0131287,0.00351025,0.508219],"study_design_scores_gemma":[0.00008115183,0.0004596586,0.002088711,0.0000480872,0.00004458005,0.0002053806,0.00008083437,0.6778512,0.3058243,0.005247387,0.008038488,0.00003032966],"study_design_candidate":"bench_or_experimental","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"methods","genre_scores_codex":[0.290717,0.0003157902,0.6804842,0.0001482906,0.00005545206,0.00007208941,0.0001912588,0.02434436,0.003671623],"genre_scores_gemma":[0.7466621,0.0001235184,0.2502409,0.00006717398,0.00001052286,0.00004741711,0.0001992029,0.0008707421,0.001778382],"genre_candidate":"methods","genre_consensus":"methods","teacher_disagreement_score":0.002411811,"threshold_uncertainty_score":0.008068323,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2154900953","doi":"10.1109/fpl.2005.1515739","title":"A verilog RTL synthesis tool for heterogeneous FPGAs","year":2005,"lang":"en","type":"article","venue":"","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":43,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Toronto","funders":"","keywords":"Field-programmable gate array; Verilog; Computer science; Computer architecture; CAD; Routing (electronic design automation); Domain (mathematical analysis); Embedded system; Logic synthesis; Reconfigurable computing; Place and route; High-level synthesis; Architecture; Logic gate; Algorithm; Engineering; Engineering drawing","authors":[{"name":"Peter Jamieson","is_ca":true},{"name":"Jonathan Rose","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.0205025177535854,"gpt":0.2614962953013756,"spread":0.2409937775477902,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.001023094,0.00087325,0.000431048,0.0008996534,0.0004213194,0.0008684298,0.001240849,0.0005289322,0.01762368],"category_scores_gemma":[0.003049094,0.0006934264,0.0005739329,0.0004256926,0.0003807287,0.0008882602,0.0004971898,0.0009820482,0.003988622],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0007009412,"about_ca_system_score_gemma":0.001300787,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.001603636,"about_ca_topic_score_gemma":0.002394505,"domain_scores_codex":[0.9992551,0.0001627448,0.00008595258,0.00009445718,0.0003308212,0.00007090875],"domain_scores_gemma":[0.9988079,0.0006407826,0.0001023281,0.0001664334,0.000259868,0.00002267146],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"design_other","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.0005524875,0.0002052503,0.001368028,0.001494625,0.00006551657,0.0009672657,0.000377459,0.2461021,0.1064522,0.04894201,0.05171725,0.5417559],"study_design_scores_gemma":[0.0004031928,0.0004093285,0.0006165849,0.0002868134,0.00007471052,0.0008424209,0.00006382947,0.7439074,0.09927586,0.02287417,0.1311582,0.00008755001],"study_design_candidate":"simulation_or_modeling","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.004370101,0.0001273551,0.9623057,0.00009176919,0.00006057382,0.0001712822,0.0009916227,0.02474248,0.007139227],"genre_scores_gemma":[0.1426313,0.0004144324,0.8362873,0.0002974485,0.00004922279,0.0008702162,0.003582969,0.005573666,0.01029349],"genre_candidate":"empirical","genre_consensus":null,"teacher_disagreement_score":0.01762368,"threshold_uncertainty_score":0.0589571,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2151403901","doi":"10.1109/te.2004.825054","title":"A Laboratory Testbed for Embedded Computer Control","year":2004,"lang":"en","type":"article","venue":"IEEE Transactions on Education","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":43,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":true},"ca_institutions":"Western University","funders":"","keywords":"Testbed; Computer science; Controller (irrigation); Embedded system; Control system; Software; Focus (optics); Control (management); The Internet; Software engineering; Interface (matter); Real-time Control System Software; Engineering; Operating system; Software design; Software development; Electrical engineering; Computer network","authors":[{"name":"Mehrdad Moallem","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.01088541341324179,"gpt":0.2669538703427993,"spread":0.2560684569295575,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.001292627,0.0006616574,0.0006808683,0.0006499116,0.0007529444,0.0009403514,0.001859984,0.0008855488,0.007093879],"category_scores_gemma":[0.001676228,0.0002910141,0.0003498979,0.0005240518,0.0006911759,0.001135023,0.001432102,0.001113196,0.001853473],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0007656869,"about_ca_system_score_gemma":0.001211257,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.0008634778,"about_ca_topic_score_gemma":0.0007162833,"domain_scores_codex":[0.9986901,0.0003746321,0.00008759177,0.0001878425,0.0004344327,0.0002254428],"domain_scores_gemma":[0.9980361,0.0003790139,0.0001366536,0.0004362169,0.0003462043,0.000665821],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"bench_or_experimental","study_design_gemma":"bench_or_experimental","study_design_scores_codex":[0.002473216,0.004917369,0.008698155,0.001208347,0.0001662691,0.002036461,0.0007703787,0.1038984,0.6198902,0.05586315,0.03902865,0.1610493],"study_design_scores_gemma":[0.001552243,0.01136333,0.008483643,0.0002733902,0.0001387206,0.001296696,0.0004164724,0.32742,0.4007625,0.01093423,0.237143,0.0002158061],"study_design_candidate":"bench_or_experimental","study_design_consensus":"bench_or_experimental","genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.2613868,0.001103359,0.6811047,0.001189105,0.001142039,0.003044996,0.002185549,0.01996622,0.02887726],"genre_scores_gemma":[0.6902317,0.0006648565,0.2892004,0.0003057055,0.0001454265,0.003292619,0.003282301,0.0005137265,0.01236329],"genre_candidate":"empirical","genre_consensus":null,"teacher_disagreement_score":0.007093879,"threshold_uncertainty_score":0.02373141,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2014577314","doi":"10.1016/j.sysarc.2006.10.012","title":"Genetic algorithms for hardware–software partitioning and optimal resource allocation","year":2006,"lang":"en","type":"article","venue":"Journal of Systems Architecture","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":43,"is_retracted":false,"has_abstract":false,"routes":{"ca_aff":true,"ca_fund":true,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Alberta","funders":"Natural Sciences and Engineering Research Council of Canada","keywords":"Computer science; Software; Scheduling (production processes); Genetic algorithm; Minification; Embedded system; Task (project management); High-level synthesis; Algorithm; Field-programmable gate array; Distributed computing; Computer hardware; Mathematical optimization; Operating system","authors":[{"name":"Madhura Purnaprajna","is_ca":true},{"name":"Marek Reformat","is_ca":true},{"name":"Witold Pedrycz","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.01350642589815584,"gpt":0.2414236074612406,"spread":0.2279171815630847,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.001728359,0.001040197,0.001340136,0.001405403,0.0009697746,0.001080942,0.001621089,0.00212152,0.003488201],"category_scores_gemma":[0.006196242,0.001026105,0.0009529587,0.001427077,0.001497063,0.001286779,0.000975074,0.001562998,0.0003928845],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.002292343,"about_ca_system_score_gemma":0.002134656,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.01972617,"about_ca_topic_score_gemma":0.01391668,"domain_scores_codex":[0.999371,0.0002864459,0.00002352763,0.00009073447,0.0001472567,0.00008117996],"domain_scores_gemma":[0.9972996,0.002214139,0.0001109542,0.0001090693,0.0002170099,0.00004936284],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"simulation_or_modeling","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.00004000066,0.00002538597,0.0001189798,0.00001903495,0.00002332293,0.00001413702,0.00003923589,0.9562474,0.0003242603,0.01149981,0.0007184427,0.03093001],"study_design_scores_gemma":[0.0000180017,0.000006791293,0.00004244486,0.000003363149,0.000005872119,0.000003361726,0.000006952695,0.9903064,0.0001098989,0.009269652,0.0002242371,0.000003057467],"study_design_candidate":"simulation_or_modeling","study_design_consensus":"simulation_or_modeling","genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.01988854,0.0005921585,0.9744251,0.0003346122,0.00007190531,0.00006404565,0.00004237885,0.0004040058,0.00417729],"genre_scores_gemma":[0.3913552,0.0004367374,0.6019812,0.0001906808,0.00009700793,0.0002983763,0.0001396475,0.0002180083,0.005283148],"genre_candidate":"empirical","genre_consensus":null,"teacher_disagreement_score":0.01972617,"threshold_uncertainty_score":0.03922266,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W4386830976","doi":"10.1145/3609335","title":"TAPA: A Scalable Task-parallel Dataflow Programming Framework for Modern FPGAs with Co-optimization of HLS and Physical Design","year":2023,"lang":"en","type":"article","venue":"ACM Transactions on Reconfigurable Technology and Systems","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":42,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":true,"ca_venue":false,"about_ca":false},"ca_institutions":"Simon Fraser University","funders":"Natural Sciences and Engineering Research Council of Canada; National Institutes of Health; National Science Foundation","keywords":"Dataflow; Computer science; Field-programmable gate array; Scalability; Task (project management); Computer architecture; Floorplan; Parallel computing; Embedded system; High-level synthesis; Operating system","authors":[{"name":"Licheng Guo","is_ca":false},{"name":"Yuze Chi","is_ca":false},{"name":"Jason Lau","is_ca":false},{"name":"Linghao Song","is_ca":false},{"name":"Xingyu Tian","is_ca":true},{"name":"Moazin Khatti","is_ca":true},{"name":"Weikang Qiao","is_ca":false},{"name":"Jie Wang","is_ca":false},{"name":"Ecenur Ustun","is_ca":false},{"name":"Zhenman Fang","is_ca":true},{"name":"Zhiru Zhang","is_ca":false},{"name":"Jason Cong","is_ca":false}],"retraction":null,"screen_n_in":null,"score":{"opus":0.0357738042739417,"gpt":0.2829732198478841,"spread":0.2471994155739424,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0009192147,0.001445775,0.0004152208,0.0006194598,0.0003711992,0.0008465056,0.001881478,0.00055606,0.009887545],"category_scores_gemma":[0.001583403,0.0006826856,0.001249602,0.0003627469,0.0005080553,0.001253742,0.001261331,0.001681887,0.002801789],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.000606371,"about_ca_system_score_gemma":0.001567406,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.002639606,"about_ca_topic_score_gemma":0.004922238,"domain_scores_codex":[0.999587,0.00008491598,0.00002578625,0.00007819456,0.0001567247,0.00006746793],"domain_scores_gemma":[0.9993702,0.0002679104,0.00006855612,0.0001413933,0.0001062952,0.00004576863],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"design_other","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.0007278227,0.0003707671,0.004525729,0.001006463,0.0002138924,0.0005393894,0.0005540322,0.2821285,0.06368592,0.034229,0.07362048,0.5383979],"study_design_scores_gemma":[0.0001909516,0.0002020043,0.0008340893,0.00008120445,0.00004851085,0.0002735389,0.00005226988,0.8782156,0.02705923,0.02062654,0.07234514,0.00007095],"study_design_candidate":"simulation_or_modeling","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"methods","genre_scores_codex":[0.006285006,0.0001340509,0.9422117,0.00008980739,0.00004311883,0.0001247135,0.0004123871,0.047617,0.003082242],"genre_scores_gemma":[0.1341206,0.0003297394,0.8446962,0.0002977087,0.00005309511,0.0006437923,0.002659361,0.01127898,0.005920526],"genre_candidate":"methods","genre_consensus":"methods","teacher_disagreement_score":0.009887545,"threshold_uncertainty_score":0.03307712,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W564382181","doi":"10.1007/978-1-4419-0739-4","title":"Quantifying and Exploring the Gap Between FPGAs and ASICs","year":2010,"lang":"en","type":"book","venue":"","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":42,"is_retracted":false,"has_abstract":false,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Toronto","funders":"","keywords":"Field-programmable gate array; Application-specific integrated circuit; Computer science; Computer architecture; Embedded system","authors":[{"name":"Ian Kuon","is_ca":true},{"name":"Jonathan Rose","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.2076425968547131,"gpt":0.3061266103978612,"spread":0.09848401354314809,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0007625881,0.000793593,0.0006611011,0.00153425,0.0004112449,0.003765734,0.0009500319,0.0007926815,0.02029506],"category_scores_gemma":[0.003025599,0.0004770194,0.0003067512,0.001743272,0.001116402,0.005716964,0.001244007,0.001627187,0.004017488],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.001147932,"about_ca_system_score_gemma":0.0007463109,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.0006905415,"about_ca_topic_score_gemma":0.001060987,"domain_scores_codex":[0.9993849,0.00008498273,0.00002188696,0.00007766695,0.0003963654,0.00003411038],"domain_scores_gemma":[0.9986277,0.0008917565,0.00005981896,0.0001517657,0.0002284935,0.00004068222],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"theoretical_or_conceptual","study_design_gemma":"bench_or_experimental","study_design_scores_codex":[0.00009172584,0.00003895787,0.0007278444,0.0006983809,0.0000357171,0.00009543491,0.000182095,0.01386384,0.006559142,0.5609891,0.02220465,0.394513],"study_design_scores_gemma":[0.00001652778,0.0001269958,0.0008929176,0.0004081121,0.00004066414,0.0006154627,0.0002871691,0.04122891,0.008160125,0.6361231,0.312068,0.00003191321],"study_design_candidate":"bench_or_experimental","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.02221975,0.09480797,0.5019583,0.00569527,0.002840545,0.00006555447,0.0004773505,0.001776702,0.3701586],"genre_scores_gemma":[0.2738222,0.07805374,0.4324902,0.001656562,0.001314171,0.0001281924,0.0008685701,0.001481347,0.2101851],"genre_candidate":"empirical","genre_consensus":null,"teacher_disagreement_score":0.02029506,"threshold_uncertainty_score":0.06789374,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2100889455","doi":"10.1109/date.2006.243777","title":"Generating Finite State Machines from System C","year":2006,"lang":"en","type":"article","venue":"","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":41,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"Concordia University","funders":"","keywords":"SystemC; Computer science; Finite-state machine; Abstraction; Programming language; Electronic system-level design and verification; Abstract state machines; State (computer science); Graph; Embedded system; Theoretical computer science","authors":[{"name":"A. Habibi","is_ca":true},{"name":"H. Moinudeen","is_ca":true},{"name":"Sofiène Tahar","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.01111680409855972,"gpt":0.222792155276001,"spread":0.2116753511774412,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.001098885,0.0007005829,0.0004583144,0.0009003531,0.000446843,0.0007417568,0.0007725871,0.0008225385,0.003235399],"category_scores_gemma":[0.005693247,0.0003198594,0.001196633,0.0005342535,0.001014489,0.0006016295,0.000825759,0.0007754723,0.0005836914],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0009180654,"about_ca_system_score_gemma":0.002204907,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.002859777,"about_ca_topic_score_gemma":0.002500419,"domain_scores_codex":[0.9985799,0.0003998355,0.00009242065,0.0002423731,0.0005335368,0.0001520252],"domain_scores_gemma":[0.9964036,0.002237172,0.0002239051,0.0005185584,0.0005654514,0.00005144555],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"simulation_or_modeling","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.0004617633,0.0002034429,0.003500802,0.0008843987,0.00009065276,0.0007723856,0.0005113492,0.5765743,0.05736443,0.2026027,0.007522599,0.1495112],"study_design_scores_gemma":[0.0001223609,0.0002398523,0.0005089002,0.00005466597,0.00003597264,0.0001441839,0.0000436676,0.8768034,0.053606,0.05762583,0.01078219,0.0000329088],"study_design_candidate":"simulation_or_modeling","study_design_consensus":"simulation_or_modeling","genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.04513801,0.00006628691,0.9435586,0.0001768167,0.00005739516,0.0004300532,0.000755084,0.005332214,0.004485518],"genre_scores_gemma":[0.4257757,0.0001199111,0.5655177,0.0001640852,0.0000242965,0.001313949,0.003088706,0.000639161,0.003356518],"genre_candidate":"empirical","genre_consensus":null,"teacher_disagreement_score":0.003235399,"threshold_uncertainty_score":0.01082349,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2118230018","doi":"10.1109/tcad.2010.2041839","title":"Bit-Width Allocation for Hardware Accelerators for Scientific Computing Using SAT-Modulo Theory","year":2010,"lang":"en","type":"article","venue":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":41,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"McMaster University","funders":"","keywords":"Modulo; Computer science; Bit (key); Arithmetic; Parallel computing; Computer hardware; Programming language; Theoretical computer science; Mathematics; Discrete mathematics; Computer security","authors":[{"name":"Adam B. Kinsman","is_ca":true},{"name":"Nicola Nicolici","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.06306565625064503,"gpt":0.2842323062549544,"spread":0.2211666500043094,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.001613886,0.0004905898,0.0006249368,0.0008394687,0.0006456957,0.001730487,0.001401817,0.0005572729,0.003978313],"category_scores_gemma":[0.004825772,0.0004030383,0.0005775955,0.0009472138,0.0007792758,0.002650338,0.001044602,0.001135657,0.000634754],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0009544116,"about_ca_system_score_gemma":0.001253742,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.000530416,"about_ca_topic_score_gemma":0.001268384,"domain_scores_codex":[0.9991807,0.0002881337,0.00006407269,0.0001072214,0.0002805605,0.0000792686],"domain_scores_gemma":[0.9985839,0.0008753478,0.000163396,0.0002283924,0.0001162592,0.00003267104],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"theoretical_or_conceptual","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.0004665895,0.000157487,0.001306985,0.0005189455,0.00006566498,0.0001356564,0.0002709595,0.3235506,0.03249048,0.3447055,0.003684287,0.2926469],"study_design_scores_gemma":[0.00005043823,0.0001299194,0.0001412582,0.00007077197,0.0000224332,0.00005563963,0.00008079923,0.8570789,0.01538855,0.1215389,0.005423704,0.0000187583],"study_design_candidate":"simulation_or_modeling","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.04631855,0.000941909,0.9440112,0.0004196419,0.00009819906,0.00007767859,0.00007060276,0.000774935,0.007287375],"genre_scores_gemma":[0.4943413,0.0005730218,0.5023331,0.0001597197,0.00005140832,0.0001481283,0.0001587075,0.0001628439,0.002071726],"genre_candidate":"empirical","genre_consensus":null,"teacher_disagreement_score":0.003978313,"threshold_uncertainty_score":0.01330876,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W1976150142","doi":"10.1145/2435264.2435272","title":"Towards simulator-like observability for FPGAs","year":2013,"lang":"en","type":"article","venue":"","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":40,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of British Columbia","funders":"Imperial College London","keywords":"Computer science; Observability; Field-programmable gate array; Multiplexer; TRACE (psycholinguistics); Debugging; Embedded system; Network on a chip; Multiplexing; Routing (electronic design automation); Chip; Embedding; Computer hardware; Real-time computing","authors":[{"name":"Eddie Hung","is_ca":true},{"name":"Steven J. E. Wilton","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.03709363176841755,"gpt":0.2800601403310273,"spread":0.2429665085626098,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.001342495,0.0005741239,0.0004715457,0.0004949511,0.000324451,0.001169924,0.0009157045,0.0007421761,0.002698686],"category_scores_gemma":[0.008963482,0.0005964917,0.0007171302,0.0002556177,0.00139407,0.001969215,0.001576344,0.001463782,0.0003241329],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0009235087,"about_ca_system_score_gemma":0.0009963518,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.001767214,"about_ca_topic_score_gemma":0.002263927,"domain_scores_codex":[0.9986992,0.0005160586,0.00006467053,0.0001726503,0.0004085028,0.0001389251],"domain_scores_gemma":[0.9953957,0.002528359,0.0004241716,0.001209256,0.0003308133,0.0001116516],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"simulation_or_modeling","study_design_gemma":"bench_or_experimental","study_design_scores_codex":[0.0002292503,0.00007542259,0.002189343,0.0001363959,0.00005139823,0.0001899443,0.00019815,0.7601938,0.01971064,0.1865906,0.0007932664,0.02964174],"study_design_scores_gemma":[0.00001948128,0.00005268944,0.0001313726,0.0000166738,0.00001022558,0.00003353523,0.00001391757,0.9499679,0.007164335,0.04053774,0.002044933,0.000007186063],"study_design_candidate":"bench_or_experimental","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.06765224,0.0001006345,0.9258912,0.000264434,0.00002983338,0.00006834271,0.0001229425,0.001904066,0.003966198],"genre_scores_gemma":[0.8362634,0.0002129346,0.160238,0.0001250546,0.0000218269,0.0001561091,0.0003598847,0.0002827154,0.002340165],"genre_candidate":"empirical","genre_consensus":null,"teacher_disagreement_score":0.002698686,"threshold_uncertainty_score":0.009028018,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2109656299","doi":"10.1145/611817.611820","title":"Architectures and algorithms for synthesizable embedded programmable logic cores","year":2003,"lang":"en","type":"article","venue":"","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":38,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of British Columbia","funders":"","keywords":"Computer science; Logic synthesis; Programmable logic device; Programmable Array Logic; Parallel computing; Programmable logic array; Computer architecture; Simple programmable logic device; Logic optimization; Logic gate; Algorithm; Logic family; Embedded system","authors":[{"name":"Noha Kafafi","is_ca":true},{"name":"Kim Bozman","is_ca":true},{"name":"Steven J. E. Wilton","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.0371157982109852,"gpt":0.2901210219541976,"spread":0.2530052237432124,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0007022089,0.0009980885,0.0004143483,0.0009976242,0.0005359011,0.001541275,0.001311249,0.0009601868,0.005715519],"category_scores_gemma":[0.002290098,0.0006394346,0.0007545879,0.0006942839,0.0008491688,0.001427862,0.0009319701,0.001372744,0.00166674],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.000953638,"about_ca_system_score_gemma":0.0008428082,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.0009874663,"about_ca_topic_score_gemma":0.002165813,"domain_scores_codex":[0.9995116,0.00008223387,0.00005545543,0.00009575271,0.0002049918,0.00005006489],"domain_scores_gemma":[0.9994253,0.0002909532,0.00007159592,0.00008931626,0.0001063005,0.00001655671],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"design_other","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.000171362,0.00009559433,0.000433418,0.0004783834,0.00003860438,0.000207483,0.0002588931,0.2279001,0.03551273,0.3411344,0.004761218,0.3890078],"study_design_scores_gemma":[0.0001250885,0.0001143703,0.00009805549,0.00009527922,0.00003706383,0.0001565426,0.00006396897,0.8227044,0.02514852,0.1318965,0.01953575,0.00002445991],"study_design_candidate":"simulation_or_modeling","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"methods","genre_scores_codex":[0.004146024,0.0001499178,0.9906656,0.00007276591,0.00002792366,0.00008569128,0.00004246989,0.001043191,0.003766442],"genre_scores_gemma":[0.05124358,0.0002679449,0.9444771,0.00005289796,0.00002458872,0.0002408552,0.0002311202,0.0001895274,0.003272391],"genre_candidate":"methods","genre_consensus":"methods","teacher_disagreement_score":0.005715519,"threshold_uncertainty_score":0.01912034,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2165594619","doi":"10.1109/iccad.1988.122459","title":"Automatic synthesis of a multi-bus architecture for DSP","year":2003,"lang":"en","type":"article","venue":"","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":36,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Waterloo","funders":"","keywords":"Computer science; Digital signal processing; Latency (audio); Benchmark (surveying); Multiplexer; Multiprocessing; Parallel computing; Signal-flow graph; Computer architecture; Graph; Network topology; Low latency (capital markets); Architecture; Embedded system; Throughput; Computer hardware; Multiplexing; Theoretical computer science; Computer network; Engineering; Operating system","authors":[{"name":"Baher Haroun","is_ca":true},{"name":"M.I. Elmasry","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.02447287335788081,"gpt":0.2717719998823389,"spread":0.247299126524458,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0002639314,0.0004100237,0.0002226623,0.0004906176,0.0004424367,0.0004405158,0.0005156305,0.0002676821,0.004739515],"category_scores_gemma":[0.0004493902,0.0002938226,0.0003596063,0.0003107755,0.0001993321,0.0003424353,0.0002837951,0.0004176184,0.001089126],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0004983079,"about_ca_system_score_gemma":0.0008508057,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.001048651,"about_ca_topic_score_gemma":0.002273548,"domain_scores_codex":[0.9997994,0.00004144825,0.00001575224,0.00003276332,0.00008432935,0.00002627686],"domain_scores_gemma":[0.9998378,0.00005022486,0.00001609297,0.00002311753,0.00006338969,0.00000934626],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"design_other","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.0001676608,0.0001009861,0.0007098052,0.0006849371,0.00005990647,0.0004021341,0.0002211313,0.2014679,0.2538093,0.08332869,0.00593679,0.4531108],"study_design_scores_gemma":[0.0001141331,0.0003394294,0.000550547,0.0001002299,0.00005660448,0.0004013264,0.00007007273,0.7834495,0.139805,0.02504745,0.05003588,0.00002977225],"study_design_candidate":"simulation_or_modeling","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.02056127,0.0001988138,0.9714764,0.00008117467,0.00003838379,0.00008566619,0.0001372905,0.001742846,0.005678228],"genre_scores_gemma":[0.1798727,0.0001947934,0.8155649,0.00005813651,0.00002323187,0.0001496394,0.0003956745,0.0002607245,0.003480275],"genre_candidate":"empirical","genre_consensus":null,"teacher_disagreement_score":0.004739515,"threshold_uncertainty_score":0.01585531,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W1884563702","doi":"10.1145/2629547","title":"The Effect of Compiler Optimizations on High-Level Synthesis-Generated Hardware","year":2015,"lang":"en","type":"article","venue":"ACM Transactions on Reconfigurable Technology and Systems","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":36,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":true,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Toronto","funders":"Natural Sciences and Engineering Research Council of Canada","keywords":"Compiler; Computer science; Undo; Field-programmable gate array; Optimizing compiler; High-level synthesis; Parallel computing; Interprocedural optimization; Profiling (computer programming); Embedded system; Loop optimization; Computer hardware; Operating system","authors":[{"name":"Qijing Huang","is_ca":true},{"name":"Ruolong Lian","is_ca":true},{"name":"Andrew Canis","is_ca":true},{"name":"Jongsok Choi","is_ca":true},{"name":"Ryan Xi","is_ca":true},{"name":"Nazanin Calagar","is_ca":true},{"name":"Stephen D. Brown","is_ca":true},{"name":"Jason H. Anderson","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.0359853048684769,"gpt":0.2535266006948906,"spread":0.2175412958264137,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.001360094,0.001032463,0.0003921795,0.0007059493,0.000308603,0.0007812484,0.0005116023,0.0003856937,0.001336192],"category_scores_gemma":[0.008627384,0.0003144146,0.0004095058,0.0006630708,0.0004308731,0.000843483,0.000321806,0.0005809964,0.0002215184],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0007754043,"about_ca_system_score_gemma":0.0008275447,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.001727796,"about_ca_topic_score_gemma":0.00335672,"domain_scores_codex":[0.9984194,0.000409633,0.000136624,0.0001819624,0.0005419489,0.0003104281],"domain_scores_gemma":[0.9910098,0.00605094,0.000928672,0.0009758963,0.0009419557,0.00009273821],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"simulation_or_modeling","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.001134634,0.0002710772,0.01363689,0.0003584118,0.0002165857,0.0002267431,0.0001130834,0.7618101,0.1339218,0.001187365,0.001017001,0.0861064],"study_design_scores_gemma":[0.00007491962,0.001483844,0.009053603,0.00002768177,0.0001510645,0.0001138147,0.00007452683,0.7141032,0.272632,0.0007636119,0.001481988,0.00003967205],"study_design_candidate":"simulation_or_modeling","study_design_consensus":"simulation_or_modeling","genre_codex":"empirical","genre_gemma":"empirical","genre_scores_codex":[0.9611906,0.0006475873,0.03279748,0.0001195949,0.00006007443,0.00006119168,0.0002871539,0.002047524,0.002788858],"genre_scores_gemma":[0.9779675,0.00009741062,0.02103069,0.00004935598,0.000008828456,0.00002533491,0.0002269721,0.0002762207,0.0003176196],"genre_candidate":"empirical","genre_consensus":"empirical","teacher_disagreement_score":0.001727796,"threshold_uncertainty_score":0.00719291,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2012627971","doi":"10.1109/aspdac.2013.6509694","title":"Range and bitmask analysis for hardware optimization in high-level synthesis","year":2013,"lang":"en","type":"article","venue":"","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":36,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Toronto","funders":"","keywords":"High-level synthesis; Computer science; Range (aeronautics); Computer architecture; Computer hardware; Field-programmable gate array; Engineering","authors":[{"name":"Marcel Gort","is_ca":true},{"name":"Jason H. Anderson","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.0319359997077947,"gpt":0.2445937769063477,"spread":0.212657777198553,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.001258071,0.0008096363,0.0004375723,0.001110444,0.000362612,0.001383798,0.0007605604,0.0004502437,0.004471953],"category_scores_gemma":[0.004747493,0.0003993747,0.0006581308,0.0008375691,0.0008814172,0.002166942,0.0006061947,0.0007942379,0.0006312696],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0007113192,"about_ca_system_score_gemma":0.0009551739,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.0008603623,"about_ca_topic_score_gemma":0.001325974,"domain_scores_codex":[0.9984093,0.0005764657,0.0001012839,0.0001718358,0.0005914287,0.0001496684],"domain_scores_gemma":[0.997654,0.001489207,0.0002693704,0.0003426844,0.000221028,0.0000237085],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"simulation_or_modeling","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.0006378642,0.00009887083,0.00347287,0.0004307576,0.00007930739,0.0001850465,0.0001897182,0.4174666,0.06326628,0.1430794,0.002007615,0.3690856],"study_design_scores_gemma":[0.0000438085,0.0003694202,0.0007888724,0.00009140617,0.00008265785,0.0001604433,0.0000592434,0.8410476,0.07874918,0.07047495,0.008088471,0.00004396189],"study_design_candidate":"simulation_or_modeling","study_design_consensus":"simulation_or_modeling","genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.03679195,0.0009871281,0.9508864,0.0001844548,0.00004891401,0.00005744729,0.00008620678,0.001970189,0.008987219],"genre_scores_gemma":[0.5690799,0.0006453105,0.4258323,0.0002016641,0.00006495835,0.0001825621,0.0001658438,0.0006420944,0.00318541],"genre_candidate":"empirical","genre_consensus":null,"teacher_disagreement_score":0.004471953,"threshold_uncertainty_score":0.01496017,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2000552960","doi":"10.1109/3pgcic.2011.25","title":"FPGA-Based Reconfigurable Hardware for Compute Intensive Data Mining Applications","year":2011,"lang":"en","type":"article","venue":"","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":35,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Victoria","funders":"","keywords":"Field-programmable gate array; Computer science; Reconfigurable computing; Embedded system; Benchmark (surveying); Flexibility (engineering); Computer architecture; Computer hardware; Cloud computing; Operating system","authors":[{"name":"Darshika G. Perera","is_ca":true},{"name":"Kin Fun Li","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.1907160239053711,"gpt":0.3154416665554712,"spread":0.1247256426501001,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0001618824,0.0003574745,0.0002024405,0.000521111,0.0002684511,0.0004436575,0.0008754806,0.0002328915,0.00458908],"category_scores_gemma":[0.0005634226,0.0001510892,0.0001787559,0.0006462615,0.0001431344,0.0003297007,0.0001382397,0.0002326491,0.0008987389],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0003446217,"about_ca_system_score_gemma":0.0003923964,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.00179276,"about_ca_topic_score_gemma":0.003265318,"domain_scores_codex":[0.9998592,0.00002887662,0.00001217479,0.00003280395,0.0000438929,0.00002312219],"domain_scores_gemma":[0.9996787,0.0001251524,0.00004467157,0.00007197407,0.00006097011,0.00001841715],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"design_other","study_design_gemma":"bench_or_experimental","study_design_scores_codex":[0.001704107,0.0002663608,0.006416075,0.0006951903,0.0001635868,0.00140333,0.0001312548,0.06576718,0.2266499,0.005806831,0.01854909,0.6724471],"study_design_scores_gemma":[0.0003844064,0.00188761,0.01907438,0.0001672615,0.0002811127,0.002462104,0.0001724166,0.5937821,0.3223524,0.003296754,0.05602418,0.0001152579],"study_design_candidate":"bench_or_experimental","study_design_consensus":null,"genre_codex":"empirical","genre_gemma":"empirical","genre_scores_codex":[0.6302982,0.005096755,0.3178383,0.0007880485,0.0005990639,0.0003683642,0.0009986117,0.01444739,0.02956521],"genre_scores_gemma":[0.8907377,0.0006782183,0.1033127,0.0001521783,0.00004218672,0.00007738626,0.0004182524,0.00007632685,0.004505082],"genre_candidate":"empirical","genre_consensus":"empirical","teacher_disagreement_score":0.00458908,"threshold_uncertainty_score":0.01535201,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2087702998","doi":"10.1007/s10009-002-0087-0","title":"A framework for superscalar microprocessor correctness statements","year":2003,"lang":"en","type":"article","venue":"International Journal on Software Tools for Technology Transfer","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":35,"is_retracted":false,"has_abstract":false,"routes":{"ca_aff":true,"ca_fund":true,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Waterloo","funders":"Natural Sciences and Engineering Research Council of Canada; University of Pennsylvania","keywords":"Correctness; Computer science; Superscalar; Theory of computation; Implementation; Microprocessor; Parameterized complexity; Programming language; Set (abstract data type); Parallel computing; Variety (cybernetics); Formal verification; Instruction set; Computer architecture; Embedded system; Algorithm; Artificial intelligence","authors":[{"name":"Mark D. Aagaard","is_ca":true},{"name":"Byron Cook","is_ca":false},{"name":"Nancy A. Day","is_ca":true},{"name":"Robert B. Jones","is_ca":false}],"retraction":null,"screen_n_in":null,"score":{"opus":0.04298718330889807,"gpt":0.355705237261135,"spread":0.312718053952237,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.004885563,0.001848821,0.001465192,0.003101575,0.00196197,0.00537957,0.005111787,0.002643818,0.01085089],"category_scores_gemma":[0.01209429,0.002272753,0.003260599,0.00201936,0.004011055,0.009603156,0.004376586,0.005422148,0.004544651],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.001752575,"about_ca_system_score_gemma":0.003379957,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.00444009,"about_ca_topic_score_gemma":0.006692074,"domain_scores_codex":[0.9953375,0.001100113,0.0005119071,0.00064783,0.001901407,0.0005013042],"domain_scores_gemma":[0.9939698,0.002613052,0.0004805998,0.001471284,0.001264442,0.000200836],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"theoretical_or_conceptual","study_design_gemma":"theoretical_or_conceptual","study_design_scores_codex":[0.0001133756,0.0001133419,0.0005200912,0.0004022197,0.0000869978,0.0003578243,0.0005581984,0.02739382,0.00599225,0.84796,0.007448868,0.1090531],"study_design_scores_gemma":[0.00008640217,0.00009458,0.0001449855,0.0002422915,0.0001588955,0.0002527454,0.0001574585,0.2671784,0.01323292,0.6578425,0.06050973,0.00009903394],"study_design_candidate":"theoretical_or_conceptual","study_design_consensus":"theoretical_or_conceptual","genre_codex":"methods","genre_gemma":"methods","genre_scores_codex":[0.001016199,0.0001016184,0.9924976,0.0001270109,0.00005236552,0.00008505147,0.00007623703,0.004789292,0.001254709],"genre_scores_gemma":[0.06345732,0.0003479633,0.9294297,0.0002469739,0.0001759134,0.0003597535,0.0004946037,0.002232431,0.003255409],"genre_candidate":"methods","genre_consensus":"methods","teacher_disagreement_score":0.01085089,"threshold_uncertainty_score":0.03629982,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2023426888","doi":"10.1007/s11265-005-4841-x","title":"Run-Time Reconfigurable Systems for Digital Signal Processing Applications: A Survey","year":2005,"lang":"en","type":"article","venue":"The Journal of VLSI Signal Processing Systems for Signal Image and Video Technology","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":34,"is_retracted":false,"has_abstract":false,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"McMaster University","funders":"","keywords":"Control reconfiguration; Digital signal processing; Computer science; Embedded system; Throughput; Power consumption; Signal processing; Digital signal processor; Real-time computing; Computer hardware; Computer architecture; Power (physics); Telecommunications","authors":[{"name":"Alireza Shoa","is_ca":true},{"name":"Shahram Shirani","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.02177915584994042,"gpt":0.2798040970484855,"spread":0.258024941198545,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0004931486,0.0007098003,0.001025671,0.001356329,0.0002315947,0.001471848,0.001501584,0.0008341053,0.003063452],"category_scores_gemma":[0.0009843535,0.0004410872,0.0004612256,0.002465308,0.0003169435,0.001547679,0.0003842944,0.0009140361,0.001693912],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0002353222,"about_ca_system_score_gemma":0.0004684491,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.000492821,"about_ca_topic_score_gemma":0.0005729999,"domain_scores_codex":[0.9995992,0.00004522365,0.00005255383,0.0001024616,0.0001644396,0.00003618008],"domain_scores_gemma":[0.9992707,0.0003480679,0.00007588388,0.00008766577,0.0001879662,0.00002963267],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"design_other","study_design_gemma":"not_applicable","study_design_scores_codex":[0.0001773658,0.0001575171,0.001286676,0.002872546,0.0000950058,0.0002112162,0.0001198885,0.01106514,0.01570126,0.02407925,0.005633008,0.9386011],"study_design_scores_gemma":[0.0001968388,0.001720489,0.004796274,0.001522779,0.0005217126,0.005705624,0.0003213118,0.1211006,0.03733001,0.04687176,0.7796764,0.0002361166],"study_design_candidate":"not_applicable","study_design_consensus":null,"genre_codex":"review","genre_gemma":"review","genre_scores_codex":[0.02645621,0.7064123,0.2369142,0.0008610541,0.0006473975,0.0001088592,0.0001619132,0.001224731,0.02721327],"genre_scores_gemma":[0.1886984,0.6286952,0.1622111,0.001123748,0.001918291,0.0001697914,0.0008361185,0.000344287,0.01600301],"genre_candidate":"review","genre_consensus":"review","teacher_disagreement_score":0.003063452,"threshold_uncertainty_score":0.01024824,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2171182892","doi":"10.5555/824475.825863","title":"DVS: an object-oriented framework for distributed Verilog simulation","year":2003,"lang":"en","type":"article","venue":"","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":34,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"McGill University","funders":"","keywords":"Computer science; Verilog; Correctness; Logic simulation; Bottleneck; Computer architecture; Hardware description language; Workstation; Processor design; Time to market; Embedded system; Distributed computing; Parallel computing; Field-programmable gate array; Logic gate; Operating system; Programming language","authors":[{"name":"Lijun Li","is_ca":true},{"name":"Hai Huang","is_ca":true},{"name":"Carl Tropper","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.03221108165102215,"gpt":0.3250162904344112,"spread":0.292805208783389,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.005585789,0.001186726,0.0009845162,0.0017728,0.0008083397,0.003468162,0.004232078,0.001671695,0.01055586],"category_scores_gemma":[0.006522605,0.001465761,0.001777092,0.0009475324,0.001966266,0.002520515,0.002962763,0.002727844,0.002990832],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.00110816,"about_ca_system_score_gemma":0.001839007,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.002933253,"about_ca_topic_score_gemma":0.002542599,"domain_scores_codex":[0.9979115,0.0007617422,0.0002325031,0.0001777687,0.0007720548,0.0001444618],"domain_scores_gemma":[0.9969701,0.001674454,0.0001865116,0.0005744474,0.0003757738,0.0002187665],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"theoretical_or_conceptual","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.0005277033,0.0003516367,0.002320527,0.0007667998,0.0002573255,0.0009052731,0.0009697892,0.3191306,0.01406424,0.3426003,0.02850902,0.2895968],"study_design_scores_gemma":[0.0002940032,0.00009449144,0.0002511933,0.0001453843,0.00005072568,0.0002073649,0.00005882003,0.8069737,0.006372351,0.09519009,0.09028925,0.00007256417],"study_design_candidate":"simulation_or_modeling","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"software","genre_scores_codex":[0.0006760375,0.00004941331,0.9874849,0.00005776952,0.00003344167,0.00008798597,0.0001075455,0.0105861,0.0009167982],"genre_scores_gemma":[0.0440095,0.0003762868,0.9465405,0.0001364162,0.00008548865,0.0007884328,0.001290484,0.004008478,0.002764445],"genre_candidate":"software","genre_consensus":null,"teacher_disagreement_score":0.01055586,"threshold_uncertainty_score":0.03531289,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null}]}