{"meta":{"page":1,"per_page":50,"max_per_page":100,"total":4,"total_is_capped":false,"direct_labels_cover":0,"predictions_cover":4,"direct_label_status":"direct model label, unvalidated","prediction_status":"machine_predicted_unvalidated (Codex and Gemma teacher distillation)","score_status":"score_only:v0-immature-baseline (scores rank; they never assert a category)","snapshot":{"source":"OpenAlex, pinned release, all 482 partitions","release":"2026-06-24","frame_built":"2026-07-12","author_layer_release":"2026-06-26"},"query_hash":"b4fd5c9f61cf","filters":{"venue":"[1992] Proceedings 29th ACM/IEEE Design Automation Conference"}},"results":[{"id":"W4233542360","doi":"10.1109/dac.1992.227836","title":"Generalized moment-matching methods for transient analysis of interconnect networks","year":2003,"lang":"en","type":"article","venue":"[1992] Proceedings 29th ACM/IEEE Design Automation Conference","topic":"Low-power high-performance VLSI design","field":"Engineering","cited_by":30,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"Carleton University","funders":"","keywords":"Moment (physics); Waveform; Transient (computer programming); Matching (statistics); Lossy compression; Computer science; Stability (learning theory); Nonlinear system; Interconnection; Algorithm; Set (abstract data type); Electronic engineering; Mathematics; Engineering; Artificial intelligence; Telecommunications; Physics; Machine learning","authors":[{"name":"Eli Chiprout","is_ca":true},{"name":"M. Nakhla","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.04627078040494223,"gpt":0.3048754043771716,"spread":0.2586046239722294,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"codex-gemma-dda1882f352a","candidate_categories":["metaepi_narrow"],"consensus_categories":[],"category_scores_codex":[0.002127457,0.0005319079,0.0009726912,0.0009343366,0.000159198,0.0002189694,0.0006498769,0.0002792874,0.0001475074],"category_scores_gemma":[0.0002349668,0.0005358624,0.0003218923,0.001459412,0.00007311112,0.0008350187,0.00002553736,0.0002787162,0.000006882612],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0002210672,"about_ca_system_score_gemma":0.00009529208,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.00001786869,"about_ca_topic_score_gemma":0.00000532699,"domain_scores_codex":[0.9971264,0.0001263319,0.001113867,0.0005730876,0.00036214,0.0006981562],"domain_scores_gemma":[0.9981511,0.0004620331,0.0003655371,0.0003922577,0.0004352495,0.0001938875],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"simulation_or_modeling","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.0001280623,0.0001173399,0.0001750201,0.0006928355,0.002310018,0.000001285124,0.006927847,0.5687541,0.355099,0.02902126,0.001730532,0.03504261],"study_design_scores_gemma":[0.0008720512,0.0001313029,0.0001797465,0.0001115206,0.0007528028,0.000004435196,0.0001953844,0.8683347,0.1264532,0.001600746,0.0008349852,0.0005291852],"study_design_candidate":"simulation_or_modeling","study_design_consensus":"simulation_or_modeling","genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.08719385,0.0001908688,0.9096335,0.00004507099,0.0005000464,0.001135713,0.00001443658,0.0007081518,0.0005783397],"genre_scores_gemma":[0.6991915,0.00008814515,0.300155,0.00005121695,0.00004073829,0.00035293,0.00002604305,0.00006614111,0.00002832692],"genre_candidate":"methods","genre_consensus":null,"teacher_disagreement_score":0.6119977,"threshold_uncertainty_score":0.9997093,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W4230145123","doi":"10.1109/dac.1992.227851","title":"Optimal scheduling and allocation of embedded VLSI chips","year":2003,"lang":"en","type":"article","venue":"[1992] Proceedings 29th ACM/IEEE Design Automation Conference","topic":"Parallel Computing and Optimization Techniques","field":"Computer Science","cited_by":25,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Waterloo","funders":"","keywords":"Chaining; Computer science; Very-large-scale integration; Parallel computing; Scheduling (production processes); Integer programming; Clock rate; Processor scheduling; Job shop scheduling; High-level synthesis; Embedded system; Mathematical optimization; Algorithm; Routing (electronic design automation); Field-programmable gate array; Chip; Mathematics; Operating system","authors":[{"name":"Catherine H. Gebotys","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.04843505675267619,"gpt":0.277019226323131,"spread":0.2285841695704549,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"codex-gemma-dda1882f352a","candidate_categories":["metaepi_narrow"],"consensus_categories":[],"category_scores_codex":[0.001153097,0.0002855227,0.0003320906,0.0003119404,0.0002338086,0.0004100972,0.0008642934,0.000174905,0.00001396872],"category_scores_gemma":[0.0007296462,0.0002974572,0.00005160464,0.0005347967,0.000103089,0.001130935,0.0001228553,0.0002090375,0.00001132933],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.00004989373,"about_ca_system_score_gemma":0.0002546681,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.000009020745,"about_ca_topic_score_gemma":3.942749e-7,"domain_scores_codex":[0.9979101,0.00009345011,0.0006067528,0.0006067475,0.0004310631,0.0003518472],"domain_scores_gemma":[0.9981318,0.0001607783,0.0005528982,0.0003642972,0.0006452498,0.0001450355],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"theoretical_or_conceptual","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.00005530603,0.0003193402,0.0008731008,0.0004755311,0.0001030121,0.000003980859,0.009146926,0.05789004,0.1207002,0.7770317,0.001672068,0.03172883],"study_design_scores_gemma":[0.000377051,0.0001443181,0.0003152393,0.0001375018,0.00001315161,0.00002992309,0.00009528713,0.8515596,0.1387706,0.008155389,0.00008192069,0.0003200783],"study_design_candidate":"simulation_or_modeling","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.03998259,0.00006263155,0.9565475,0.0002727752,0.0001094534,0.0004593486,0.000001032497,0.0008768443,0.001687816],"genre_scores_gemma":[0.5253552,0.00002742147,0.4744774,0.00005780996,0.00001598218,0.00002830723,0.000002057737,0.00001042941,0.00002537254],"genre_candidate":"methods","genre_consensus":null,"teacher_disagreement_score":0.7936696,"threshold_uncertainty_score":0.9999477,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W4234875748","doi":"10.1109/dac.1992.227777","title":"TEMPT: technology mapping for the exploration of FPGA architectures with hard-wired connections","year":2003,"lang":"en","type":"article","venue":"[1992] Proceedings 29th ACM/IEEE Design Automation Conference","topic":"VLSI and FPGA Design Techniques","field":"Engineering","cited_by":9,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Toronto","funders":"","keywords":"Netlist; Field-programmable gate array; Computer science; Set (abstract data type); Parallel computing; Embedded system","authors":[{"name":"Kevin Chung","is_ca":true},{"name":"Jonathan Rose","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.07288281590620302,"gpt":0.2520814451196865,"spread":0.1791986292134835,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"codex-gemma-dda1882f352a","candidate_categories":["metaepi_narrow"],"consensus_categories":[],"category_scores_codex":[0.0005363019,0.0003151947,0.0003376227,0.0004677339,0.0002737018,0.0001353754,0.0004486422,0.0002266648,0.00002498269],"category_scores_gemma":[0.0004737691,0.000246886,0.00006639901,0.0006446276,0.0001576439,0.0004311281,0.00001815127,0.000228578,0.000005407544],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0000726173,"about_ca_system_score_gemma":0.0001125106,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.000007190776,"about_ca_topic_score_gemma":0.00000669324,"domain_scores_codex":[0.9985133,0.00002605309,0.0005038223,0.0003331098,0.0002580926,0.0003655685],"domain_scores_gemma":[0.9986299,0.0003113949,0.0002438949,0.000304688,0.000448175,0.0000619312],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"bench_or_experimental","study_design_gemma":"bench_or_experimental","study_design_scores_codex":[0.000107153,0.000112918,0.0004572218,0.0008947498,0.000363203,0.000001871162,0.005303459,0.01220862,0.8215804,0.1029056,0.006149703,0.04991519],"study_design_scores_gemma":[0.0006996137,0.0003706783,0.0002222642,0.0002946048,0.00008404286,0.00004806712,0.001462094,0.1297071,0.8226919,0.04157986,0.002337695,0.0005021221],"study_design_candidate":"bench_or_experimental","study_design_consensus":"bench_or_experimental","genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.01769268,0.0001035369,0.9771246,0.0004633079,0.0001278913,0.001744291,0.00001323919,0.001789443,0.0009409623],"genre_scores_gemma":[0.9086342,0.00004513793,0.08990946,0.00003586861,0.00004307811,0.001234545,0.000006151847,0.00005321282,0.00003832936],"genre_candidate":"methods","genre_consensus":null,"teacher_disagreement_score":0.8909416,"threshold_uncertainty_score":0.9999983,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W4255840877","doi":"10.1109/dac.1992.227805","title":"An efficient algorithm for microword length minimization","year":2003,"lang":"en","type":"article","venue":"[1992] Proceedings 29th ACM/IEEE Design Automation Conference","topic":"VLSI and FPGA Design Techniques","field":"Engineering","cited_by":7,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Calgary","funders":"","keywords":"Minification; Computer science; Graph; Algorithm; Mathematical optimization; Theoretical computer science; Mathematics; Programming language","authors":[{"name":"R. Puri","is_ca":true},{"name":"Jinxiang Gu","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.03351824797113805,"gpt":0.2569164784611113,"spread":0.2233982304899733,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"codex-gemma-dda1882f352a","candidate_categories":["metaepi_narrow"],"consensus_categories":[],"category_scores_codex":[0.0006612125,0.0004306533,0.0003634335,0.0003186098,0.0002191689,0.0003612007,0.0005056009,0.0003022882,0.00006997387],"category_scores_gemma":[0.0002026651,0.0004632706,0.00008729693,0.0003644182,0.00006053518,0.0006017502,0.000014886,0.0002063144,0.00003473665],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0001638667,"about_ca_system_score_gemma":0.0001138241,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.000004917175,"about_ca_topic_score_gemma":8.808803e-7,"domain_scores_codex":[0.9979576,0.00004171027,0.0005760674,0.0005266775,0.0003324576,0.0005654276],"domain_scores_gemma":[0.9987254,0.000124534,0.000183974,0.000306975,0.0004595254,0.0001995767],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"bench_or_experimental","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.00005558741,0.0004505148,0.0001233141,0.0007585165,0.0001584311,0.000005065037,0.003955323,0.01795543,0.5652549,0.03195142,0.02253387,0.3567976],"study_design_scores_gemma":[0.0004465546,0.000186862,0.00005137483,0.00007479499,0.0000354827,0.0000153315,0.0001292486,0.7140645,0.2805905,0.002305068,0.001638443,0.0004617618],"study_design_candidate":"bench_or_experimental","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.009613523,0.00006327283,0.9841794,0.00004018261,0.0003097357,0.00150557,0.00002820484,0.002667896,0.001592188],"genre_scores_gemma":[0.6367944,0.00003341573,0.3624677,0.00005734379,0.00008495991,0.0004104808,0.00003503967,0.00007556303,0.00004107519],"genre_candidate":"methods","genre_consensus":null,"teacher_disagreement_score":0.6961091,"threshold_uncertainty_score":0.9997819,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null}]}