{"meta":{"page":1,"per_page":50,"max_per_page":100,"total":4,"total_is_capped":false,"direct_labels_cover":0,"predictions_cover":4,"direct_label_status":"direct model label, unvalidated","prediction_status":"machine_predicted_unvalidated (Codex and Gemma teacher distillation)","score_status":"score_only:v0-immature-baseline (scores rank; they never assert a category)","snapshot":{"source":"OpenAlex, pinned release, all 482 partitions","release":"2026-06-24","frame_built":"2026-07-12","author_layer_release":"2026-06-26"},"query_hash":"3cdf94666982","filters":{"venue":"Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015"}},"results":[{"id":"W4252446866","doi":"10.7873/date.2015.0817","title":"Towards An Accurate Reliability, Availability and Maintainability Analysis Approach for Satellite Systems Based on Probabilistic Model Checking","year":2015,"lang":"en","type":"article","venue":"Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015","topic":"Software Reliability and Analysis Research","field":"Computer Science","cited_by":14,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"Polytechnique Montréal; Concordia University","funders":"","keywords":"Maintainability; Reliability engineering; Computer science; Reliability (semiconductor); Probabilistic logic; Satellite; Model checking; Artificial intelligence; Software engineering; Engineering; Programming language","authors":[{"name":"Khaza Anuarul Hoque","is_ca":true},{"name":"Otmane Aı̈t Mohamed","is_ca":true},{"name":"Yvon Savaria","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.1530481491274419,"gpt":0.3465684916765019,"spread":0.1935203425490601,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.003930705,0.001331208,0.001091406,0.001843831,0.0006106034,0.001972407,0.00276017,0.001148281,0.001700119],"category_scores_gemma":[0.01128391,0.001173434,0.002962573,0.0008627853,0.001165004,0.002465409,0.001718871,0.002382634,0.0004239615],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.001588247,"about_ca_system_score_gemma":0.004557189,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.008936722,"about_ca_topic_score_gemma":0.009872605,"domain_scores_codex":[0.9964341,0.0009883991,0.0002416353,0.0003737727,0.001668873,0.0002931918],"domain_scores_gemma":[0.9922858,0.004650062,0.0008777663,0.001089134,0.001000359,0.00009681169],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"simulation_or_modeling","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.00004099248,0.00006061174,0.001041347,0.0001162119,0.00007198207,0.0001175495,0.00007760421,0.9594329,0.005217579,0.01741482,0.0002498753,0.01615841],"study_design_scores_gemma":[0.000005869972,0.00001496118,0.00006153323,0.000009774972,0.00001720494,0.00002334498,0.000004708107,0.9942273,0.001349859,0.004014341,0.0002669298,0.000004215734],"study_design_candidate":"simulation_or_modeling","study_design_consensus":"simulation_or_modeling","genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.007020617,0.00006936237,0.9913262,0.0000627929,0.00001089905,0.00005185265,0.00006825113,0.0008896143,0.0005003997],"genre_scores_gemma":[0.499615,0.0004309207,0.4974726,0.0001275576,0.00004471417,0.0003798958,0.0004656994,0.0003553976,0.001108241],"genre_candidate":"empirical","genre_consensus":null,"teacher_disagreement_score":0.008936722,"threshold_uncertainty_score":0.02078778,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W4233255510","doi":"10.7873/date.2015.0970","title":"Minimizing the Number of Process Corner Simulations during Design Verification","year":2015,"lang":"en","type":"article","venue":"Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015","topic":"Manufacturing Process and Optimization","field":"Engineering","cited_by":9,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Alberta","funders":"","keywords":"Process corners; Process (computing); Transistor; Computer science; Key (lock); Function (biology); Voltage; Range (aeronautics); Integrated circuit; Electronic engineering; Mathematical optimization; Computer engineering; Engineering; Mathematics; Electrical engineering","authors":[{"name":"Michael Shoniker","is_ca":true},{"name":"B.F. Cockburn","is_ca":true},{"name":"Jie Han","is_ca":true},{"name":"Witold Pedrycz","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.08695593336660833,"gpt":0.2975296831639558,"spread":0.2105737497973475,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.001561108,0.001202291,0.001018481,0.0005350345,0.0004461437,0.0006138076,0.001176424,0.0008770858,0.002510219],"category_scores_gemma":[0.01262307,0.0009479992,0.0009265896,0.0003411885,0.0006618557,0.001292629,0.0008980583,0.00130996,0.0006032001],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0009325293,"about_ca_system_score_gemma":0.002065547,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.002999964,"about_ca_topic_score_gemma":0.004502749,"domain_scores_codex":[0.9982809,0.0008218978,0.00006899243,0.0002201308,0.0004395025,0.0001685657],"domain_scores_gemma":[0.9892764,0.008463439,0.0006247143,0.0008626617,0.0006303993,0.0001424441],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"simulation_or_modeling","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.0001732712,0.00004444428,0.001136213,0.00007581477,0.00004167,0.00006405223,0.00006113328,0.9582845,0.009446019,0.002339005,0.0003888593,0.02794497],"study_design_scores_gemma":[0.00001362872,0.00004531447,0.0001408024,0.000007757926,0.00001091416,0.00001659014,0.00001109975,0.994001,0.003763738,0.001642672,0.0003423103,0.000004169613],"study_design_candidate":"simulation_or_modeling","study_design_consensus":"simulation_or_modeling","genre_codex":"methods","genre_gemma":"methods","genre_scores_codex":[0.08195737,0.0002082584,0.9134054,0.0002379464,0.00002144432,0.00009661006,0.00007727648,0.001396153,0.002599603],"genre_scores_gemma":[0.6952867,0.0001537193,0.3017106,0.0001297472,0.00001742766,0.0002202971,0.0002620466,0.0004748581,0.00174467],"genre_candidate":"methods","genre_consensus":"methods","teacher_disagreement_score":0.002999964,"threshold_uncertainty_score":0.00839752,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W4240612068","doi":"10.7873/date.2015.0342","title":"A Methodology for Automated Design of Embedded Bit-flips Detectors in Post-Silicon Validation","year":2015,"lang":"en","type":"article","venue":"Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015","topic":"VLSI and Analog Circuit Testing","field":"Computer Science","cited_by":4,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":true,"ca_venue":false,"about_ca":false},"ca_institutions":"McMaster University","funders":"McGill University","keywords":"Computer science; Detector; Bit (key); Latency (audio); Domain (mathematical analysis); Embedded system; Computer hardware; Computer engineering; Real-time computing; Mathematics","authors":[{"name":"Pouya Taatizadeh","is_ca":true},{"name":"Nicola Nicolici","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.2614822672069271,"gpt":0.3594507826561819,"spread":0.09796851544925478,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.003439781,0.001336666,0.000862383,0.001332034,0.000632774,0.001504315,0.00249903,0.001188521,0.002745955],"category_scores_gemma":[0.008425258,0.0007538146,0.001663463,0.0006055139,0.001467988,0.00159647,0.001565594,0.001392723,0.001040094],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0007065069,"about_ca_system_score_gemma":0.00216237,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.0009744044,"about_ca_topic_score_gemma":0.001559146,"domain_scores_codex":[0.9957545,0.001437848,0.000381112,0.0006169097,0.001449113,0.0003605078],"domain_scores_gemma":[0.9922862,0.003423454,0.001031776,0.001632037,0.001501456,0.0001251447],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"design_other","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.000418196,0.0005612786,0.006239552,0.001297461,0.0002780907,0.0009006372,0.000766541,0.2186952,0.2055512,0.07211187,0.003592769,0.4895873],"study_design_scores_gemma":[0.000121315,0.0008514065,0.001087373,0.0001663346,0.0001771909,0.0005960557,0.0001282321,0.7811515,0.1633516,0.03926586,0.01302503,0.00007822457],"study_design_candidate":"simulation_or_modeling","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"methods","genre_scores_codex":[0.004483208,0.00004977531,0.9931136,0.00003283919,0.00001229607,0.0001873913,0.00004218389,0.001735455,0.000343293],"genre_scores_gemma":[0.1025859,0.00007719399,0.8955951,0.00008391716,0.00001473654,0.0003488486,0.000193322,0.0002873969,0.0008136847],"genre_candidate":"methods","genre_consensus":"methods","teacher_disagreement_score":0.003439781,"threshold_uncertainty_score":0.01819152,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W4256605373","doi":"10.7873/date.2015.0331","title":"Automated Rectification Methodologies to Functional State-Space Unreachability","year":2015,"lang":"en","type":"article","venue":"Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015","topic":"Fault Detection and Control Systems","field":"Engineering","cited_by":4,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Toronto","funders":"","keywords":"Computer science; Reachability; State (computer science); Debugging; Set (abstract data type); Automation; State space; Process (computing); Task (project management); Model checking; Formal verification; Theoretical computer science; Computer engineering; Algorithm; Programming language; Mathematics; Systems engineering; Engineering","authors":[{"name":"Ryan Berryhill","is_ca":true},{"name":"Andreas Veneris","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.1615082697552232,"gpt":0.326432760432717,"spread":0.1649244906774938,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.001974534,0.001325014,0.0007933835,0.002171648,0.0007024485,0.001184944,0.002218661,0.0009671753,0.005940391],"category_scores_gemma":[0.008556967,0.0007016312,0.001225524,0.001085262,0.001942783,0.002010763,0.001986105,0.001703972,0.000883271],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0009928945,"about_ca_system_score_gemma":0.001596709,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.002196668,"about_ca_topic_score_gemma":0.00203791,"domain_scores_codex":[0.9974511,0.0008161289,0.0001580285,0.000434214,0.0009803713,0.0001601509],"domain_scores_gemma":[0.9956316,0.001977136,0.0005438792,0.001172978,0.0006325827,0.00004184868],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"design_other","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.0001313856,0.0001416592,0.0008250871,0.0005961425,0.00006183847,0.0003956215,0.0007729805,0.2435937,0.01953597,0.1097577,0.002579475,0.6216084],"study_design_scores_gemma":[0.00005133301,0.0001805899,0.0003308608,0.0001338598,0.00004778524,0.000300367,0.0001541471,0.8737772,0.02521312,0.08289887,0.01687025,0.00004164692],"study_design_candidate":"simulation_or_modeling","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"methods","genre_scores_codex":[0.003716707,0.0002259043,0.9930634,0.00007584424,0.00001450706,0.00006749857,0.00002085249,0.001609935,0.001205347],"genre_scores_gemma":[0.2308637,0.0005519419,0.7643719,0.0001223253,0.00004245672,0.0002484271,0.000204148,0.0004358481,0.003159296],"genre_candidate":"methods","genre_consensus":"methods","teacher_disagreement_score":0.005940391,"threshold_uncertainty_score":0.01987255,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null}]}