{"meta":{"page":1,"per_page":50,"max_per_page":100,"total":36,"total_is_capped":false,"direct_labels_cover":0,"predictions_cover":36,"direct_label_status":"direct model label, unvalidated","prediction_status":"machine_predicted_unvalidated (Codex and Gemma teacher distillation)","score_status":"score_only:v0-immature-baseline (scores rank; they never assert a category)","snapshot":{"source":"OpenAlex, pinned release, all 482 partitions","release":"2026-06-24","frame_built":"2026-07-12","author_layer_release":"2026-06-26"},"query_hash":"015f665a58ab","filters":{"venue":"IET Computers & Digital Techniques"}},"results":[{"id":"W3084828086","doi":"10.1049/iet-cdt.2019.0179","title":"High throughput and area‐efficient FPGA implementation of AES for high‐traffic applications","year":2020,"lang":"en","type":"article","venue":"IET Computers & Digital Techniques","topic":"Cryptographic Implementations and Security","field":"Computer Science","cited_by":44,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":true,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Saskatchewan","funders":"Natural Sciences and Engineering Research Council of Canada","keywords":"Field-programmable gate array; Computer science; Advanced Encryption Standard; Loop unrolling; Throughput; Byte; AES implementations; Encryption; Parallel computing; Embedded system; Computer hardware; Computer network; Operating system","authors":[{"name":"Karim Shahbazi","is_ca":true},{"name":"Seok‐Bum Ko","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.01814031823590541,"gpt":0.2833424466529851,"spread":0.2652021284170797,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.000143199,0.0004471455,0.000163837,0.0004567323,0.0002008929,0.0003782866,0.0005919422,0.0002130207,0.003509795],"category_scores_gemma":[0.0002896305,0.0001390798,0.0002254314,0.0002801455,0.0001109595,0.0006407694,0.0001682576,0.0002881882,0.00106111],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0003097972,"about_ca_system_score_gemma":0.0003952921,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.0007145219,"about_ca_topic_score_gemma":0.001029885,"domain_scores_codex":[0.999764,0.00003279893,0.0000177582,0.00003241084,0.0001097312,0.00004325695],"domain_scores_gemma":[0.9998274,0.00002370033,0.00003087535,0.00002986278,0.00007915841,0.000008988041],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"bench_or_experimental","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.001173781,0.0002850066,0.004122538,0.0006085146,0.000173371,0.001330018,0.0001623855,0.0492716,0.494875,0.0171476,0.01358341,0.4172668],"study_design_scores_gemma":[0.000259888,0.002019144,0.005588829,0.00007544217,0.0001595907,0.002911583,0.0001029069,0.2937656,0.6187433,0.00285574,0.07343449,0.00008354821],"study_design_candidate":"simulation_or_modeling","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.2992896,0.002353576,0.645144,0.0004550564,0.0003827135,0.0003395601,0.0003672364,0.005988765,0.04567952],"genre_scores_gemma":[0.8966403,0.0005254535,0.09108788,0.000118417,0.00005658912,0.00007230642,0.0003609406,0.00008078112,0.01105734],"genre_candidate":"empirical","genre_consensus":null,"teacher_disagreement_score":0.003509795,"threshold_uncertainty_score":0.0117414,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W1511491629","doi":"10.1049/iet-cdt.2010.0021","title":"Bit-serial and digit-serial GF(2 <sup> <i>m</i> </sup> ) Montgomery multipliers using linear feedback shift registers","year":2011,"lang":"en","type":"article","venue":"IET Computers & Digital Techniques","topic":"Cryptography and Residue Arithmetic","field":"Computer Science","cited_by":37,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Victoria","funders":"","keywords":"Trinomial; GF(2); Arithmetic; Shift register; Multiplication (music); Computer science; Finite field; Parallel computing; Binary number; Numerical digit; Block (permutation group theory); Mathematics; Discrete mathematics; Chip; Combinatorics","authors":[{"name":"Miguel Morales‐Sandoval","is_ca":true},{"name":"Claudia Feregrino-Uribe","is_ca":false},{"name":"Paris Kitsos","is_ca":false}],"retraction":null,"screen_n_in":null,"score":{"opus":0.02419302560343754,"gpt":0.2299707600941064,"spread":0.2057777344906689,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.000192261,0.0004464835,0.0002206953,0.000522664,0.0002814377,0.0004892843,0.0004560065,0.0004003211,0.003358918],"category_scores_gemma":[0.0005635585,0.0001630789,0.0003368319,0.0003973622,0.000248546,0.001141015,0.0003732307,0.0004301877,0.001059449],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0002876532,"about_ca_system_score_gemma":0.0002928193,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.0001591934,"about_ca_topic_score_gemma":0.0004742979,"domain_scores_codex":[0.9998673,0.00002350643,0.00001213902,0.0000287814,0.00005032512,0.00001793393],"domain_scores_gemma":[0.9997873,0.00005374762,0.00004757984,0.00004034873,0.00005834933,0.00001272998],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"design_other","study_design_gemma":"bench_or_experimental","study_design_scores_codex":[0.0008037728,0.0001450476,0.001853941,0.0005718094,0.00009597935,0.0005788836,0.0003282817,0.01928245,0.3706911,0.07522666,0.003525187,0.526897],"study_design_scores_gemma":[0.0001934178,0.00206256,0.003248618,0.0002109,0.0001873057,0.004679443,0.000185801,0.15565,0.6964868,0.02746076,0.109512,0.0001223944],"study_design_candidate":"bench_or_experimental","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"methods","genre_scores_codex":[0.2371847,0.003520743,0.7288399,0.0004324565,0.0004152679,0.0001793709,0.0001670319,0.001773806,0.02748663],"genre_scores_gemma":[0.6470501,0.001721215,0.3322137,0.0001612777,0.0001878825,0.0001018959,0.0002593901,0.0001044053,0.01820004],"genre_candidate":"methods","genre_consensus":"methods","teacher_disagreement_score":0.003358918,"threshold_uncertainty_score":0.01123673,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2091507826","doi":"10.1049/iet-cdt:20060209","title":"Debug enhancements in assertion-checker generation","year":2007,"lang":"en","type":"article","venue":"IET Computers & Digital Techniques","topic":"Radiation Effects in Electronics","field":"Engineering","cited_by":30,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"McGill University","funders":"","keywords":"Assertion; Debugging; Computer science; Background debug mode interface; Set (abstract data type); Overhead (engineering); Programming language; Algorithmic program debugging; Embedded system; Computer architecture","authors":[{"name":"M. Boulé","is_ca":true},{"name":"J.-S. Chenard","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.006455475369999442,"gpt":0.2303529738590217,"spread":0.2238974984890222,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.00600324,0.001199113,0.0006195511,0.001557444,0.0003907795,0.00152433,0.00235341,0.0011866,0.01003502],"category_scores_gemma":[0.0336039,0.0008180521,0.0008248436,0.0007722666,0.0006702569,0.003942002,0.001875682,0.001906959,0.002577578],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0004465935,"about_ca_system_score_gemma":0.00109802,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.0007650542,"about_ca_topic_score_gemma":0.001409133,"domain_scores_codex":[0.9949961,0.00204958,0.0004745583,0.0006249957,0.001455692,0.0003990075],"domain_scores_gemma":[0.9686798,0.01673857,0.00117718,0.009978812,0.003134202,0.00029143],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"design_other","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.003598583,0.0007986893,0.01743756,0.0008030588,0.0001624551,0.002367621,0.001372232,0.04450743,0.111559,0.06120304,0.01935371,0.7368366],"study_design_scores_gemma":[0.0006713366,0.001517887,0.003459963,0.000220885,0.0003248766,0.002954346,0.0002380996,0.5650336,0.3140382,0.03498568,0.07636829,0.0001868629],"study_design_candidate":"simulation_or_modeling","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.04644214,0.0002393304,0.9066927,0.0004762982,0.0002757215,0.0003326796,0.0004106012,0.04017952,0.004950959],"genre_scores_gemma":[0.4097073,0.0001665915,0.5801618,0.0004491179,0.0001194627,0.0002194431,0.0008832403,0.003055153,0.005237894],"genre_candidate":"empirical","genre_consensus":null,"teacher_disagreement_score":0.01003502,"threshold_uncertainty_score":0.03357047,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2169353951","doi":"10.1049/iet-cdt.2013.0017","title":"Unified multi‐objective mapping and architecture customisation of networks‐on‐chip","year":2013,"lang":"en","type":"article","venue":"IET Computers & Digital Techniques","topic":"Interconnection Networks and Systems","field":"Computer Science","cited_by":25,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Victoria; Thompson Rivers University","funders":"","keywords":"Benchmark (surveying); Network on a chip; Reliability (semiconductor); Computer science; Network topology; Routing (electronic design automation); Network architecture; Computer architecture; Chip; Embedded system; Power (physics); Reliability engineering; Topology (electrical circuits); Engineering; Computer network","authors":[{"name":"Ahmed A. Morgan","is_ca":false},{"name":"Haytham Elmiligi","is_ca":true},{"name":"M. Watheq El‐Kharashi","is_ca":false},{"name":"Fayez Gebali","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.0130692556947012,"gpt":0.2169101794572758,"spread":0.2038409237625745,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.001373463,0.0008687004,0.0005853806,0.001056983,0.0002974232,0.0006494686,0.0009134162,0.0006096642,0.0011948],"category_scores_gemma":[0.002665413,0.0003765237,0.000666191,0.0006183502,0.0005143231,0.0006166964,0.000826562,0.0005960703,0.000154823],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0007295471,"about_ca_system_score_gemma":0.0008693041,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.001372639,"about_ca_topic_score_gemma":0.001747318,"domain_scores_codex":[0.9993212,0.00029063,0.00002966992,0.00008667162,0.000200627,0.00007124479],"domain_scores_gemma":[0.9991721,0.0004091958,0.0001336144,0.0001085936,0.0001526697,0.00002382834],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"simulation_or_modeling","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.00001732272,0.00003244775,0.0003582916,0.00004495469,0.00002607531,0.00003591566,0.00003428489,0.9458477,0.004550769,0.002446263,0.0002052512,0.04640074],"study_design_scores_gemma":[0.00000648023,0.00004679486,0.0001725906,0.000008013149,0.00001124169,0.00001980295,0.00001463931,0.9938734,0.002546337,0.002691053,0.0006049561,0.000004781842],"study_design_candidate":"simulation_or_modeling","study_design_consensus":"simulation_or_modeling","genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.07582686,0.0003453218,0.918832,0.0001086932,0.00002805172,0.0001491733,0.00003854262,0.0004445238,0.004226894],"genre_scores_gemma":[0.600951,0.0002385854,0.396067,0.00007925104,0.00001702489,0.0003255643,0.0001267062,0.0001793533,0.002015525],"genre_candidate":"empirical","genre_consensus":null,"teacher_disagreement_score":0.001373463,"threshold_uncertainty_score":0.00726366,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2068411283","doi":"10.1049/iet-cdt.2013.0053","title":"Sample preparation with multiple dilutions on digital microfluidic biochips","year":2013,"lang":"en","type":"article","venue":"IET Computers & Digital Techniques","topic":"Electrowetting and Microfluidic Technologies","field":"Engineering","cited_by":24,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":false,"ca_fund":true,"ca_venue":false,"about_ca":false},"ca_institutions":"","funders":"Indian Statistical Institute; Innovation, Science and Economic Development Canada","keywords":"Biochip; Microfluidics; Digital microfluidics; Serial dilution; Sample (material); Dilution; Sample preparation; Computer science; Computer hardware; Lab-on-a-chip; Nanotechnology; Electrowetting; Process engineering; Embedded system; Electrode; Materials science; Chromatography; Chemistry; Engineering","authors":[{"name":"Sukanta Bhattacharjee","is_ca":false},{"name":"Ansuman Banerjee","is_ca":false},{"name":"Bhargab B. Bhattacharya","is_ca":false}],"retraction":null,"screen_n_in":null,"score":{"opus":0.005253316474402197,"gpt":0.1898671238417767,"spread":0.1846138073673745,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.00040242,0.0004620166,0.000387422,0.0002495706,0.0002633591,0.0005853098,0.0007764702,0.0004277173,0.001712934],"category_scores_gemma":[0.0004593267,0.0003105222,0.0003583435,0.000292615,0.0002994441,0.0006853156,0.0004669075,0.0004632856,0.0006853894],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0004787272,"about_ca_system_score_gemma":0.0002268283,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.0003410745,"about_ca_topic_score_gemma":0.0004140373,"domain_scores_codex":[0.9997118,0.0000244981,0.00002064982,0.00008959878,0.0001270155,0.0000263711],"domain_scores_gemma":[0.9998037,0.00007823799,0.00002917641,0.00004752222,0.00003009488,0.00001113142],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"bench_or_experimental","study_design_gemma":"bench_or_experimental","study_design_scores_codex":[0.0001364584,0.00006556813,0.0005087062,0.0001582734,0.00001876168,0.00007937036,0.0000387449,0.0112334,0.9666862,0.001948407,0.000387215,0.01873886],"study_design_scores_gemma":[0.00002361474,0.0001225031,0.0002090352,0.000005663776,0.00001173718,0.00003791444,0.000006983007,0.03514429,0.9609987,0.0003750004,0.003053119,0.00001151566],"study_design_candidate":"bench_or_experimental","study_design_consensus":"bench_or_experimental","genre_codex":"empirical","genre_gemma":"empirical","genre_scores_codex":[0.5329868,0.001276148,0.4548341,0.000453972,0.0003177843,0.0005992948,0.0006566013,0.001938985,0.006936206],"genre_scores_gemma":[0.6680819,0.001092623,0.3258331,0.0001977915,0.00004980734,0.0003205649,0.0004885323,0.0001230291,0.003812617],"genre_candidate":"empirical","genre_consensus":"empirical","teacher_disagreement_score":0.001712934,"threshold_uncertainty_score":0.005730391,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2124879637","doi":"10.1049/iet-cdt:20060074","title":"Optimised realisations of large integer multipliers and squarers using embedded blocks","year":2007,"lang":"en","type":"article","venue":"IET Computers & Digital Techniques","topic":"Low-power high-performance VLSI design","field":"Engineering","cited_by":22,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"Polytechnique Montréal; Royal Military College of Canada","funders":"","keywords":"Multiplier (economics); Field-programmable gate array; Arithmetic; Integer (computer science); Multiplication (music); Computer science; Mathematics; Adder; Parallel computing; Computer hardware; Combinatorics","authors":[{"name":"Shuang Gao","is_ca":true},{"name":"Noureddine Chabini","is_ca":true},{"name":"D. Al-Khalili","is_ca":true},{"name":"P. Langlois","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.009338906035856749,"gpt":0.2439678919098013,"spread":0.2346289858739445,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0003755727,0.0008200587,0.0003097086,0.00033909,0.0001752055,0.0006160866,0.0009343984,0.0003180026,0.003769365],"category_scores_gemma":[0.0008246727,0.0003757519,0.000354455,0.0002612992,0.0002769104,0.0006393617,0.0003318166,0.0005033404,0.0009239361],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0003505843,"about_ca_system_score_gemma":0.0004741344,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.0003264215,"about_ca_topic_score_gemma":0.001105909,"domain_scores_codex":[0.9996865,0.00006059993,0.00002486869,0.00005056534,0.0001396688,0.00003775633],"domain_scores_gemma":[0.9996383,0.0001296827,0.00007607385,0.00004941734,0.00009566527,0.00001084261],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"bench_or_experimental","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.0003544009,0.0001250125,0.0007270243,0.0008476328,0.0001117076,0.0005273741,0.0002160392,0.2181044,0.4313884,0.0289146,0.00208887,0.3165945],"study_design_scores_gemma":[0.0001825153,0.001915134,0.001122652,0.000152569,0.0001309369,0.001231197,0.0001099737,0.6588594,0.2840783,0.009191827,0.04296745,0.00005803034],"study_design_candidate":"simulation_or_modeling","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.04446167,0.000530312,0.9482471,0.00005343354,0.00006046238,0.000156088,0.00004123302,0.001132423,0.005317226],"genre_scores_gemma":[0.2766739,0.0003275218,0.7169276,0.00005641188,0.00003687401,0.0001742563,0.0001200341,0.0001569167,0.005526515],"genre_candidate":"empirical","genre_consensus":null,"teacher_disagreement_score":0.003769365,"threshold_uncertainty_score":0.01260978,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2590023945","doi":"10.1049/iet-cdt.2016.0100","title":"Area‐ and power‐efficient iterative single/double‐precision merged floating‐point multiplier on FPGA","year":2017,"lang":"en","type":"article","venue":"IET Computers & Digital Techniques","topic":"Numerical Methods and Algorithms","field":"Computer Science","cited_by":18,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":true,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Saskatchewan","funders":"Natural Sciences and Engineering Research Council of Canada; University of Saskatchewan","keywords":"Multiplier (economics); Field-programmable gate array; Digital signal processing; Computer science; Virtex; Application-specific integrated circuit; Clock rate; Computer hardware; Floating point; Double-precision floating-point format; Embedded system; Parallel computing; Algorithm; Chip; Telecommunications","authors":[{"name":"Hao Zhang","is_ca":true},{"name":"Dongdong Chen","is_ca":false},{"name":"Seok‐Bum Ko","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.03027444964146115,"gpt":0.2961824391776271,"spread":0.265907989536166,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.00008358176,0.0002893393,0.0001713642,0.0003027843,0.0002307935,0.0002877097,0.0005535895,0.0001866044,0.002398637],"category_scores_gemma":[0.0001649822,0.0001186239,0.0001623235,0.0003159998,0.00008330334,0.000409186,0.0001304385,0.0001876895,0.0004872706],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0002362122,"about_ca_system_score_gemma":0.0004136705,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.0007364907,"about_ca_topic_score_gemma":0.001414214,"domain_scores_codex":[0.9999021,0.00001301198,0.000006061551,0.00001915141,0.00004152808,0.00001814034],"domain_scores_gemma":[0.9999379,0.00001082038,0.00001101193,0.000009824219,0.00002702976,0.000003427791],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"bench_or_experimental","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.000486962,0.0000868253,0.001548164,0.0004124375,0.00009601432,0.0005750606,0.0001451033,0.03822736,0.5290868,0.0142743,0.004717833,0.4103432],"study_design_scores_gemma":[0.0001785882,0.002151752,0.006354922,0.0001114755,0.0001249688,0.00221788,0.0001270004,0.4339685,0.4909028,0.003663587,0.06011998,0.00007865811],"study_design_candidate":"simulation_or_modeling","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"methods","genre_scores_codex":[0.3469982,0.002189903,0.6184677,0.00020355,0.0001518635,0.0001491978,0.000198368,0.002429593,0.02921154],"genre_scores_gemma":[0.8048162,0.0006248914,0.1844367,0.00006716158,0.00003177927,0.0000796602,0.0001991373,0.00004018035,0.00970427],"genre_candidate":"methods","genre_consensus":"methods","teacher_disagreement_score":0.002398637,"threshold_uncertainty_score":0.008024275,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2103884101","doi":"10.1049/iet-cdt.2010.0005","title":"Dual-edge triggered sense amplifier flip-flop for resonant clock distribution networks","year":2010,"lang":"en","type":"article","venue":"IET Computers & Digital Techniques","topic":"Low-power high-performance VLSI design","field":"Engineering","cited_by":18,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"Concordia University","funders":"","keywords":"Flip-flop; Signal edge; Electronic engineering; Clock rate; Clock signal; Reduction (mathematics); Power (physics); Amplifier; Sense amplifier; Enhanced Data Rates for GSM Evolution; Clock network; Computer science; Electrical engineering; Engineering; Synchronous circuit; Voltage; Electronic circuit; CMOS; Physics; Telecommunications; Digital signal processing","authors":[{"name":"S. E. Esmaeili","is_ca":true},{"name":"A.J. Al-Khalili","is_ca":true},{"name":"Glenn Cowan","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.005852492083715271,"gpt":0.2043902853105789,"spread":0.1985377932268636,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.000141559,0.0001652366,0.0001114493,0.000122498,0.0001893791,0.0002611017,0.000650002,0.0002184246,0.001804335],"category_scores_gemma":[0.0003216192,0.0001036949,0.0001060434,0.00009208693,0.0001709215,0.000353683,0.0001839652,0.0001867021,0.0002182891],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0002757228,"about_ca_system_score_gemma":0.0002782033,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.0003135124,"about_ca_topic_score_gemma":0.001034395,"domain_scores_codex":[0.9999121,0.00001627589,0.000004660968,0.00002117289,0.00003258189,0.00001315263],"domain_scores_gemma":[0.999871,0.00004429851,0.00002330453,0.00002026603,0.00003155007,0.000009443012],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"bench_or_experimental","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.0004419273,0.00007872298,0.001595502,0.000189242,0.0000225561,0.0003402249,0.0001021966,0.0222721,0.8213062,0.01775607,0.001578826,0.1343164],"study_design_scores_gemma":[0.0001235932,0.001112719,0.002065249,0.00003666288,0.00006254459,0.001198388,0.00005241289,0.3885449,0.5835928,0.003464251,0.0197126,0.00003387866],"study_design_candidate":"simulation_or_modeling","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.3100863,0.0006130844,0.6808373,0.0002542532,0.0001154801,0.0001219499,0.0001018825,0.001011258,0.006858536],"genre_scores_gemma":[0.930921,0.0001011807,0.06730808,0.00006239241,0.00001490307,0.00002794832,0.00002931212,0.00001563424,0.001519623],"genre_candidate":"empirical","genre_consensus":null,"teacher_disagreement_score":0.001804335,"threshold_uncertainty_score":0.006036043,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2912351760","doi":"10.1049/iet-cdt.2018.5055","title":"KBMA: A knowledge‐based multi‐objective application mapping approach for 3D NoC","year":2019,"lang":"en","type":"article","venue":"IET Computers & Digital Techniques","topic":"Interconnection Networks and Systems","field":"Computer Science","cited_by":17,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Saskatchewan","funders":"Department of Science and Technology, Ministry of Science and Technology, India","keywords":"Computer science; Particle swarm optimization; Network on a chip; Network topology; Computer architecture; Distributed computing; Computer engineering; Embedded system; Machine learning; Computer network","authors":[{"name":"Aravindhan Alagarsamy","is_ca":false},{"name":"Lakshminarayanan Gopalakrishnan","is_ca":false},{"name":"Seok‐Bum Ko","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.01925941181660942,"gpt":0.2558613399660693,"spread":0.2366019281494599,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0004280274,0.0006270339,0.0004767403,0.0006437562,0.0004066277,0.000604682,0.001174499,0.0009575941,0.002057157],"category_scores_gemma":[0.0008301863,0.000311222,0.0006694596,0.0003963647,0.0003550942,0.0005321649,0.0009646395,0.000610464,0.0002294737],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0004253626,"about_ca_system_score_gemma":0.0007270451,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.003040605,"about_ca_topic_score_gemma":0.003170535,"domain_scores_codex":[0.9998322,0.00005322895,0.000007722651,0.00002452842,0.00006236712,0.00001993672],"domain_scores_gemma":[0.999796,0.0001115337,0.00002616564,0.00001489637,0.0000387281,0.00001271149],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"simulation_or_modeling","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.00003093185,0.00005053332,0.000302837,0.00008740022,0.00006067973,0.00006313727,0.00005727771,0.920553,0.005078995,0.004917558,0.0007413407,0.06805634],"study_design_scores_gemma":[0.000005584437,0.00002909906,0.00006863203,0.000005106721,0.00000623229,0.00001808467,0.000009537573,0.9970259,0.0005506346,0.001552664,0.0007242505,0.000004178826],"study_design_candidate":"simulation_or_modeling","study_design_consensus":"simulation_or_modeling","genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.01815395,0.0003638825,0.9760572,0.0001749452,0.00006660245,0.00009115133,0.00004329434,0.000343848,0.004705284],"genre_scores_gemma":[0.5306433,0.0003360399,0.4631933,0.0002449571,0.00004444083,0.0005473887,0.0001084042,0.00009984378,0.004782252],"genre_candidate":"empirical","genre_consensus":null,"teacher_disagreement_score":0.003040605,"threshold_uncertainty_score":0.006881893,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2752065998","doi":"10.1049/iet-cdt.2016.0200","title":"High performance and energy efficient single‐precision and double‐precision merged floating‐point adder on FPGA","year":2017,"lang":"en","type":"article","venue":"IET Computers & Digital Techniques","topic":"Numerical Methods and Algorithms","field":"Computer Science","cited_by":14,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":true,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Saskatchewan","funders":"Natural Sciences and Engineering Research Council of Canada; University of Saskatchewan","keywords":"Adder; Field-programmable gate array; Double-precision floating-point format; Computer science; Single-precision floating-point format; Stratix; Computer hardware; Carry-save adder; Throughput; Efficient energy use; Parallel computing; Floating point; Embedded system; Algorithm; Engineering; Latency (audio); Electrical engineering","authors":[{"name":"Hao Zhang","is_ca":true},{"name":"Dongdong Chen","is_ca":false},{"name":"Seok‐Bum Ko","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.01911748253702997,"gpt":0.264125057771962,"spread":0.2450075752349321,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.000105159,0.0004144532,0.0003228053,0.0005464449,0.0003321426,0.0005301939,0.0006666458,0.0002713669,0.00275676],"category_scores_gemma":[0.0001807842,0.0001936837,0.0002378082,0.0004417904,0.0001089846,0.0007098117,0.0002504419,0.0002883045,0.0006067721],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0003321334,"about_ca_system_score_gemma":0.0005982193,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.0008460327,"about_ca_topic_score_gemma":0.002132595,"domain_scores_codex":[0.9998642,0.00001169447,0.00001170873,0.0000200079,0.00006898775,0.00002338427],"domain_scores_gemma":[0.9999167,0.00001323083,0.00001226539,0.00001315802,0.00003780805,0.000006829338],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"design_other","study_design_gemma":"bench_or_experimental","study_design_scores_codex":[0.0007765735,0.0001033072,0.001123027,0.0007507248,0.0001531918,0.001049715,0.00009925789,0.03518555,0.3892067,0.02167181,0.0169629,0.5329172],"study_design_scores_gemma":[0.0002624624,0.001454665,0.004959418,0.0001638305,0.0002402437,0.003856783,0.0001181474,0.3568588,0.5211678,0.006305279,0.1044523,0.000160119],"study_design_candidate":"bench_or_experimental","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.3088078,0.006015766,0.6288176,0.0005740874,0.0007954567,0.0003269963,0.001115219,0.008508508,0.0450386],"genre_scores_gemma":[0.7141592,0.001135838,0.2697974,0.0001542806,0.00008093995,0.0001105969,0.0008759131,0.0000683855,0.01361747],"genre_candidate":"empirical","genre_consensus":null,"teacher_disagreement_score":0.00275676,"threshold_uncertainty_score":0.009222209,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2953295373","doi":"10.1049/iet-cdt.2019.0115","title":"Efficient spiking neural network training and inference with reduced precision memory and computing","year":2019,"lang":"en","type":"article","venue":"IET Computers & Digital Techniques","topic":"Advanced Memory and Neural Computing","field":"Engineering","cited_by":11,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Saskatchewan","funders":"","keywords":"Floating point; Computer science; Computer hardware; MNIST database; Fixed-point arithmetic; Spiking neural network; Integer (computer science); Memory footprint; Algorithm; Artificial neural network; Parallel computing; Artificial intelligence","authors":[{"name":"Yi Wang","is_ca":true},{"name":"Karim Shahbazi","is_ca":true},{"name":"Hao Zhang","is_ca":true},{"name":"Kwang‐Il Oh","is_ca":false},{"name":"Jae‐Jin Lee","is_ca":false},{"name":"Seok‐Bum Ko","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.01228700419381351,"gpt":0.2313508790151258,"spread":0.2190638748213123,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0003567669,0.0005828787,0.0003611408,0.0003014587,0.0002620601,0.0006867379,0.001293127,0.0004553194,0.002621708],"category_scores_gemma":[0.001709239,0.0002422368,0.0003253874,0.0005022161,0.0002858478,0.001526147,0.0004704453,0.0007526391,0.0005870523],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0005732991,"about_ca_system_score_gemma":0.001001637,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.003773146,"about_ca_topic_score_gemma":0.00669061,"domain_scores_codex":[0.9997503,0.00002259826,0.00002245461,0.00005841332,0.0001079543,0.00003833061],"domain_scores_gemma":[0.9996043,0.0001368971,0.00004313976,0.00009666097,0.000107581,0.00001138949],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"design_other","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.0004505048,0.0001578704,0.002746714,0.0003785228,0.000134393,0.0002901054,0.0001338931,0.3983294,0.07398041,0.01872631,0.003809983,0.5008618],"study_design_scores_gemma":[0.00001640635,0.00008780646,0.0006428326,0.00001973765,0.00002962927,0.00009434895,0.00002537382,0.9525233,0.03783099,0.005420963,0.003295384,0.00001317786],"study_design_candidate":"simulation_or_modeling","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.1023857,0.001007405,0.8850702,0.000382264,0.0001774314,0.00006452046,0.0002067441,0.00282597,0.007879645],"genre_scores_gemma":[0.7448041,0.0005372458,0.2488723,0.0001946152,0.00003264444,0.000114018,0.0004363772,0.0001565369,0.004852012],"genre_candidate":"empirical","genre_consensus":null,"teacher_disagreement_score":0.003773146,"threshold_uncertainty_score":0.008770466,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W1995613452","doi":"10.1049/iet-cdt:20070120","title":"SC Build: a computer-aided design tool for design space exploration of embedded central processing unit cores for field-programmable gate arrays","year":2008,"lang":"en","type":"article","venue":"IET Computers & Digital Techniques","topic":"VLSI and FPGA Design Techniques","field":"Engineering","cited_by":11,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Windsor","funders":"","keywords":"Design space exploration; Computer science; Gate array; Field-programmable gate array; Field (mathematics); Genetic algorithm; Computer Aided Design; Design tool; Computer architecture; Space exploration; Core (optical fiber); Space (punctuation); Embedded system; Multi-core processor; Computer engineering; Computer hardware; Parallel computing; Engineering; Aerospace engineering; Operating system","authors":[{"name":"Ian D. L. Anderson","is_ca":true},{"name":"Mohammed Khalid","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.04922049004676316,"gpt":0.2587224714955857,"spread":0.2095019814488226,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0007951258,0.0009933633,0.0005064083,0.0007267206,0.00033189,0.0007225176,0.001008615,0.000701003,0.008583534],"category_scores_gemma":[0.00252743,0.0005319471,0.0006569884,0.0004850224,0.0004130164,0.0004906883,0.0005044321,0.0009220624,0.0009633505],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0005263002,"about_ca_system_score_gemma":0.001635858,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.003095229,"about_ca_topic_score_gemma":0.006114244,"domain_scores_codex":[0.9997126,0.00006831152,0.00001619925,0.00002525842,0.0001555691,0.00002200972],"domain_scores_gemma":[0.9989288,0.0007825927,0.00007452206,0.00005632161,0.0001365172,0.00002126852],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"simulation_or_modeling","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.0003082549,0.0001083371,0.001762842,0.0007960157,0.0001225213,0.0003959464,0.0003490661,0.6172047,0.03192222,0.01722681,0.01474747,0.3150559],"study_design_scores_gemma":[0.0001181561,0.0001073204,0.0002333107,0.00004784041,0.00003022726,0.0001387126,0.000033101,0.9722454,0.008878654,0.003919122,0.01422508,0.00002306351],"study_design_candidate":"simulation_or_modeling","study_design_consensus":"simulation_or_modeling","genre_codex":"methods","genre_gemma":"methods","genre_scores_codex":[0.01122904,0.0001857108,0.9727208,0.0000815207,0.00003077361,0.0001378013,0.0002760444,0.01185961,0.003478565],"genre_scores_gemma":[0.1134717,0.0002726816,0.881144,0.00009276756,0.00001278323,0.0006424335,0.0005821675,0.001090358,0.002691124],"genre_candidate":"methods","genre_consensus":"methods","teacher_disagreement_score":0.008583534,"threshold_uncertainty_score":0.02871484,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2093498840","doi":"10.1049/iet-cdt.2012.0088","title":"Customised soft processor design: a compromise between architecture description languages and parameterisable processors","year":2013,"lang":"en","type":"article","venue":"IET Computers & Digital Techniques","topic":"Parallel Computing and Optimization Techniques","field":"Computer Science","cited_by":8,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":true,"ca_venue":false,"about_ca":false},"ca_institutions":"Polytechnique Montréal","funders":"Fonds Québécois de la Recherche sur la Nature et les Technologies","keywords":"Datapath; Computer science; Computer architecture; Flexibility (engineering); Microarchitecture; Instruction set; Processor design; Process (computing); Set (abstract data type); Architecture; Design space exploration; Embedded system; Parallel computing; Operating system; Programming language","authors":[{"name":"Shervin Vakili","is_ca":true},{"name":"J. M. Pierre Langlois","is_ca":true},{"name":"Guy Bois","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.01717081266265948,"gpt":0.2531135861739861,"spread":0.2359427735113266,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.002248919,0.0005066937,0.0002483478,0.0004554238,0.0002163878,0.001443762,0.001850934,0.0005630632,0.002666308],"category_scores_gemma":[0.003584708,0.0005914944,0.0005055785,0.0004497776,0.0006388467,0.002511354,0.001398287,0.001883281,0.0008540807],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0005988582,"about_ca_system_score_gemma":0.001044549,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.0004377751,"about_ca_topic_score_gemma":0.001127384,"domain_scores_codex":[0.9984357,0.0004383693,0.000174266,0.0001949941,0.0006469674,0.0001096512],"domain_scores_gemma":[0.9972932,0.000906314,0.0001913546,0.001175954,0.0003621198,0.00007098909],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"design_other","study_design_gemma":"theoretical_or_conceptual","study_design_scores_codex":[0.0005763867,0.0002140115,0.001667447,0.0007653876,0.0001046778,0.0004865035,0.0007947058,0.08557766,0.1706992,0.1141629,0.003890052,0.621061],"study_design_scores_gemma":[0.0002997847,0.0008304027,0.001275941,0.0003023516,0.0001535958,0.001543203,0.0003405446,0.5005475,0.2401768,0.05485131,0.1995135,0.0001651023],"study_design_candidate":"theoretical_or_conceptual","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"methods","genre_scores_codex":[0.01806222,0.0002995135,0.9749743,0.0002052531,0.0000328781,0.0001468787,0.00004938554,0.00189753,0.004331985],"genre_scores_gemma":[0.2166752,0.0007787703,0.7712725,0.0004624769,0.00003034105,0.0003514993,0.0002689082,0.0008357947,0.00932435],"genre_candidate":"methods","genre_consensus":"methods","teacher_disagreement_score":0.002666308,"threshold_uncertainty_score":0.01189351,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W3135842381","doi":"10.1049/cdt2.12026","title":"Low‐space bit‐serial systolic array architecture for interleaved multiplication over GF(2 <sup> <i>m</i> </sup> )","year":2021,"lang":"en","type":"article","venue":"IET Computers & Digital Techniques","topic":"Coding theory and cryptography","field":"Computer Science","cited_by":7,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Victoria","funders":"","keywords":"Multiplier (economics); Very-large-scale integration; Arithmetic; Application-specific integrated circuit; Systolic array; Computer science; Multiplication (music); GF(2); Binary number; Cryptography; Finite field; Computer hardware; Parallel computing; Mathematics; Algorithm; Embedded system; Discrete mathematics; Combinatorics","authors":[{"name":"Atef Ibrahim","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.007820306266085804,"gpt":0.230148635912285,"spread":0.2223283296461992,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0001232426,0.000299195,0.0001552627,0.0003907532,0.0002763768,0.0003763662,0.0006755196,0.0002295936,0.003196349],"category_scores_gemma":[0.0002177746,0.0001145688,0.0001784812,0.0005567168,0.0001622869,0.0004515678,0.0001842075,0.0002747267,0.001239923],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0002509756,"about_ca_system_score_gemma":0.0005207758,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.0003970836,"about_ca_topic_score_gemma":0.0009881783,"domain_scores_codex":[0.9999119,0.00002036211,0.000009225345,0.0000146629,0.00003316726,0.00001078894],"domain_scores_gemma":[0.9998742,0.00001561721,0.00002208433,0.00001944358,0.00005894106,0.000009737465],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"bench_or_experimental","study_design_gemma":"theoretical_or_conceptual","study_design_scores_codex":[0.0006192101,0.0001559936,0.00195017,0.0003096051,0.00008670305,0.0004877986,0.0001705934,0.02252531,0.5460081,0.04414644,0.006692581,0.3768475],"study_design_scores_gemma":[0.000342277,0.002684338,0.002734328,0.0000870103,0.0002020366,0.002149472,0.0001343938,0.4373686,0.471709,0.01584933,0.06665277,0.00008639164],"study_design_candidate":"theoretical_or_conceptual","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"methods","genre_scores_codex":[0.1916279,0.0006607727,0.7886457,0.0003587925,0.0002375282,0.0001098981,0.000198558,0.002514027,0.01564676],"genre_scores_gemma":[0.6398074,0.0004337428,0.348078,0.0001830902,0.000111453,0.000106584,0.0004053112,0.00005411162,0.01082035],"genre_candidate":"methods","genre_consensus":"methods","teacher_disagreement_score":0.003196349,"threshold_uncertainty_score":0.01069289,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W3134549106","doi":"10.1049/cdt2.12012","title":"Reliable SRAM using NAND‐NOR Gate in beyond‐CMOS QCA technology","year":2021,"lang":"en","type":"article","venue":"IET Computers & Digital Techniques","topic":"Quantum-Dot Cellular Automata","field":"Computer Science","cited_by":7,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Saskatchewan","funders":"","keywords":"NAND gate; CMOS; Inverter; Logic gate; Electronic engineering; Computer science; Gate equivalent; Quantum dot cellular automaton; NAND logic; Electronic circuit; AND-OR-Invert; AND gate; Adder; Logic synthesis; Electrical engineering; Engineering; Logic family; Gate oxide; Transistor","authors":[{"name":"Marshal Raj","is_ca":false},{"name":"G. Lakshminarayanan","is_ca":false},{"name":"Seok‐Bum Ko","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.01153176808702251,"gpt":0.2431194410620365,"spread":0.2315876729750139,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0001218362,0.0001837485,0.0003343796,0.000170069,0.0003451383,0.0006344325,0.0007744406,0.0004165421,0.001747243],"category_scores_gemma":[0.000264505,0.0001015745,0.0002178635,0.0002743513,0.0002600309,0.0005807345,0.0002174905,0.000184147,0.000371352],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0005943545,"about_ca_system_score_gemma":0.0004278351,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.001826438,"about_ca_topic_score_gemma":0.002675879,"domain_scores_codex":[0.9998831,0.00001041507,0.000008359414,0.0000266374,0.00005314877,0.00001833884],"domain_scores_gemma":[0.9997174,0.00005466058,0.0000512874,0.00004449595,0.0001154667,0.00001671653],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"bench_or_experimental","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.0006202816,0.000187947,0.003637384,0.0005476007,0.00008700304,0.001881689,0.0002156027,0.05637236,0.8467979,0.03585428,0.004313313,0.04948454],"study_design_scores_gemma":[0.000113374,0.0009091353,0.002624578,0.00006002793,0.00009853264,0.0008098063,0.00008468155,0.5030051,0.4697075,0.006389164,0.01611985,0.00007820888],"study_design_candidate":"simulation_or_modeling","study_design_consensus":null,"genre_codex":"empirical","genre_gemma":"empirical","genre_scores_codex":[0.8982195,0.002115463,0.07511518,0.0009783905,0.0003624553,0.00008749429,0.0009011498,0.001522273,0.02069797],"genre_scores_gemma":[0.9838652,0.0001814433,0.01423244,0.00003838611,0.00001290961,0.00001642113,0.00009005218,0.00001730868,0.001545835],"genre_candidate":"empirical","genre_consensus":"empirical","teacher_disagreement_score":0.001826438,"threshold_uncertainty_score":0.005845129,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2341796638","doi":"10.1049/iet-cdt.2015.0058","title":"Decimal floating‐point fused multiply‐add with redundant internal encodings","year":2015,"lang":"en","type":"article","venue":"IET Computers & Digital Techniques","topic":"Numerical Methods and Algorithms","field":"Computer Science","cited_by":7,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":true,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Saskatchewan","funders":"Natural Sciences and Engineering Research Council of Canada; University of Saskatchewan","keywords":"Rounding; Adder; Arithmetic; Decimal; Critical path method; Computer science; Floating point; Square root; Binary number; Division (mathematics); Parallel computing; Multiplier (economics); Multiplication algorithm; Algorithm; Mathematics; Engineering; Latency (audio)","authors":[{"name":"Hao Zhang","is_ca":true},{"name":"Seok‐Bum Ko","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.02259920138639028,"gpt":0.2639737822558015,"spread":0.2413745808694112,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0002368452,0.0006581004,0.000420926,0.0008996816,0.000433862,0.0008768343,0.0009342831,0.0003539466,0.003672069],"category_scores_gemma":[0.0006937251,0.0002885767,0.0005203965,0.000820618,0.0002959865,0.001011999,0.0004443698,0.0004979674,0.001619333],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0004491157,"about_ca_system_score_gemma":0.000626952,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.0005379376,"about_ca_topic_score_gemma":0.001120337,"domain_scores_codex":[0.9996656,0.0000365748,0.00003751542,0.000057722,0.0001530922,0.00004936461],"domain_scores_gemma":[0.9996327,0.00005533176,0.00006324204,0.00009879647,0.0001357452,0.00001412339],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"design_other","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.0007427023,0.0001567647,0.001165401,0.0007498515,0.0001120022,0.0008851627,0.0002980181,0.03035175,0.2489045,0.0701834,0.008868823,0.6375817],"study_design_scores_gemma":[0.0001401176,0.001363506,0.002075165,0.0002411745,0.0002975049,0.003524635,0.0001267913,0.2827412,0.5653965,0.01995223,0.1240022,0.0001388933],"study_design_candidate":"simulation_or_modeling","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.1476938,0.002202337,0.8105761,0.0003958613,0.0005503546,0.0001413349,0.000372883,0.005449246,0.03261818],"genre_scores_gemma":[0.5750083,0.0008261665,0.4087049,0.0002187286,0.0001606437,0.0001182715,0.0005592834,0.0001335828,0.01427003],"genre_candidate":"empirical","genre_consensus":null,"teacher_disagreement_score":0.003672069,"threshold_uncertainty_score":0.01228428,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W3091655542","doi":"10.1049/iet-cdt.2019.0082","title":"Power efficient error correction coding for on‐chip interconnection links","year":2020,"lang":"en","type":"article","venue":"IET Computers & Digital Techniques","topic":"Low-power high-performance VLSI design","field":"Engineering","cited_by":6,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Saskatchewan","funders":"","keywords":"Interconnection; Chip; Computer science; Coding (social sciences); Power (physics); Electronic engineering; Embedded system; Engineering; Telecommunications; Mathematics; Physics","authors":[{"name":"Y. V. Ramana Rao","is_ca":false},{"name":"Seok‐Bum Ko","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.01470135790045721,"gpt":0.2245636549695623,"spread":0.2098622970691051,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0001704092,0.0003357724,0.0001524582,0.0004749353,0.000240032,0.0004104835,0.000666232,0.0003191284,0.001556658],"category_scores_gemma":[0.0008509589,0.00009480119,0.0001258729,0.0004952852,0.0001848817,0.0004118553,0.0003065609,0.0003235475,0.0003294538],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0004448489,"about_ca_system_score_gemma":0.0005955878,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.00110295,"about_ca_topic_score_gemma":0.002700103,"domain_scores_codex":[0.9997656,0.00003383077,0.00001235383,0.00003038311,0.0001270029,0.00003082354],"domain_scores_gemma":[0.9993906,0.0001280021,0.000120727,0.0001160622,0.0002308854,0.00001377412],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"design_other","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.000347835,0.000184786,0.002269697,0.0003937148,0.00006024905,0.0005082843,0.0002530445,0.1703673,0.3046171,0.03171232,0.007801255,0.4814844],"study_design_scores_gemma":[0.00003574479,0.0003384925,0.001654395,0.00006618622,0.00004066741,0.0005050772,0.00003635179,0.6710848,0.3047914,0.003728621,0.01767963,0.00003863098],"study_design_candidate":"simulation_or_modeling","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"methods","genre_scores_codex":[0.3009851,0.001060229,0.6791306,0.0003471768,0.0002099546,0.00016431,0.0003785617,0.003170121,0.01455394],"genre_scores_gemma":[0.8971064,0.0003607376,0.09500504,0.0001165624,0.0000326926,0.00008428288,0.0003340973,0.0001415595,0.006818638],"genre_candidate":"methods","genre_consensus":"methods","teacher_disagreement_score":0.001556658,"threshold_uncertainty_score":0.005207539,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W1970019860","doi":"10.1049/iet-cdt.2010.0024","title":"Reordering the assembly instructions in basic blocks to reduce switching activities on the instruction bus","year":2011,"lang":"en","type":"article","venue":"IET Computers & Digital Techniques","topic":"Parallel Computing and Optimization Techniques","field":"Computer Science","cited_by":6,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"Royal Military College of Canada","funders":"","keywords":"Heuristics; Operand; Computer science; Parallel computing; Integer (computer science); Power (physics); Reduction (mathematics); Computation; Integer programming; Embedded system; Code (set theory); Dissipation; Computer hardware; Programming language; Algorithm; Operating system; Mathematics","authors":[{"name":"Noureddine Chabini","is_ca":true},{"name":"Marilyn Wolf","is_ca":false}],"retraction":null,"screen_n_in":null,"score":{"opus":0.02590197359389883,"gpt":0.2451128317876077,"spread":0.2192108581937089,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.000228726,0.001025344,0.0006093381,0.0005137963,0.0002885099,0.0005305399,0.0006903862,0.0003906221,0.003555316],"category_scores_gemma":[0.001095581,0.0003520226,0.0004518907,0.0005470714,0.0002855895,0.000633317,0.0002425409,0.0009184543,0.001077227],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0003678411,"about_ca_system_score_gemma":0.001054011,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.001648688,"about_ca_topic_score_gemma":0.003767618,"domain_scores_codex":[0.9998129,0.0000350016,0.00001603019,0.00003779929,0.00005092091,0.00004743128],"domain_scores_gemma":[0.9993302,0.0002558099,0.0001480374,0.0001333609,0.0001087175,0.00002382643],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"design_other","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.0006163417,0.000434656,0.001910859,0.0004984557,0.00004098999,0.0003193837,0.0002617828,0.1582334,0.2996272,0.007809135,0.003393879,0.5268539],"study_design_scores_gemma":[0.0002861058,0.002858938,0.005475302,0.0001168118,0.0002236397,0.0007719425,0.000342048,0.5869638,0.3351559,0.01383784,0.0538752,0.00009249809],"study_design_candidate":"simulation_or_modeling","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.3394139,0.001062206,0.6426596,0.0005032287,0.0001725246,0.000506893,0.0001925626,0.0035223,0.01196678],"genre_scores_gemma":[0.474035,0.0006807991,0.5169892,0.0002086194,0.00004881617,0.0002005782,0.0005442808,0.0005150568,0.006777768],"genre_candidate":"empirical","genre_consensus":null,"teacher_disagreement_score":0.003555316,"threshold_uncertainty_score":0.01189375,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W1551456964","doi":"10.1049/iet-cdt.2011.0089","title":"Decimal floating-point antilogarithmic converter based on selection by rounding: algorithm and architecture","year":2012,"lang":"en","type":"article","venue":"IET Computers & Digital Techniques","topic":"Numerical Methods and Algorithms","field":"Computer Science","cited_by":5,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":true,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Saskatchewan","funders":"Natural Sciences and Engineering Research Council of Canada","keywords":"Rounding; Decimal; CORDIC; Computer science; Critical path method; Parallel computing; Algorithm; Floating point; Double-precision floating-point format; Standard cell; Field-programmable gate array; Latency (audio); Architecture; Arithmetic; Computer hardware; Mathematics; Integrated circuit; Engineering","authors":[{"name":"Dake Chen","is_ca":true},{"name":"Limin Han","is_ca":true},{"name":"Seok‐Bum Ko","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.008669592829528056,"gpt":0.2506249088624793,"spread":0.2419553160329513,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0002513782,0.0003420674,0.0003684832,0.0006762027,0.000360507,0.001077487,0.00103899,0.0003467079,0.003572748],"category_scores_gemma":[0.0005840982,0.0001934814,0.0002668648,0.0006312257,0.0002902616,0.0007521936,0.0003200696,0.0004575664,0.001690587],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0003894709,"about_ca_system_score_gemma":0.000828811,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.0007515118,"about_ca_topic_score_gemma":0.0009937993,"domain_scores_codex":[0.9996953,0.00003788875,0.00003116218,0.0000633705,0.0001414313,0.00003095641],"domain_scores_gemma":[0.9998149,0.00003689713,0.00001707574,0.00004413967,0.00007812755,0.000008800639],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"design_other","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.0005538376,0.000140383,0.00142543,0.0004133832,0.00005970432,0.0004333923,0.0002243049,0.02735047,0.1583019,0.05523388,0.005116678,0.7507465],"study_design_scores_gemma":[0.0002436903,0.001141488,0.001993835,0.000165525,0.000142283,0.004353511,0.0001821058,0.4879265,0.4064976,0.01828368,0.07892396,0.0001458531],"study_design_candidate":"simulation_or_modeling","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"methods","genre_scores_codex":[0.04640586,0.0008895779,0.9295315,0.0002228784,0.0001622574,0.000209758,0.0001156272,0.004835539,0.01762702],"genre_scores_gemma":[0.4043915,0.0007300668,0.5864415,0.0001715045,0.00008860467,0.0001412696,0.0003008405,0.0001149969,0.007619706],"genre_candidate":"methods","genre_consensus":"methods","teacher_disagreement_score":0.003572748,"threshold_uncertainty_score":0.0119521,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W3168383044","doi":"10.1049/cdt2.12032","title":"Introducing <i>KeyRing</i> self‐timed microarchitecture and timing‐driven design flow","year":2021,"lang":"en","type":"article","venue":"IET Computers & Digital Techniques","topic":"Low-power high-performance VLSI design","field":"Engineering","cited_by":5,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":true,"ca_venue":false,"about_ca":false},"ca_institutions":"École de Technologie Supérieure; Polytechnique Montréal","funders":"Natural Sciences and Engineering Research Council of Canada; Canadian Network for Research and Innovation in Machining Technology, Natural Sciences and Engineering Research Council of Canada","keywords":"Microarchitecture; Static timing analysis; Computer science; Design flow; Clock gating; Electronic design automation; Computer architecture; Standard cell; Circuit design; Processor design; Physical design; Embedded system; Integrated circuit design; Electronic circuit; Parallel computing; Integrated circuit; Clock skew; Clock signal; Engineering; Jitter","authors":[{"name":"Mickael Fiorentino","is_ca":true},{"name":"Claude Thibeault","is_ca":true},{"name":"Yvon Savaria","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.00612957763553337,"gpt":0.1850439377866857,"spread":0.1789143601511523,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0004788269,0.0002685999,0.0001167542,0.0003553559,0.0001505233,0.000556276,0.0004906562,0.0002243505,0.001618051],"category_scores_gemma":[0.0004627577,0.0002048531,0.0002381249,0.0002285712,0.0003576533,0.0005195881,0.0002918619,0.000357672,0.0002877972],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0004432966,"about_ca_system_score_gemma":0.0006261965,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.0007570072,"about_ca_topic_score_gemma":0.001273758,"domain_scores_codex":[0.9997634,0.00005478418,0.00002539071,0.00003630093,0.00008798319,0.00003213183],"domain_scores_gemma":[0.9997284,0.00007096778,0.00005033584,0.00007435133,0.00006616564,0.000009886385],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"design_other","study_design_gemma":"bench_or_experimental","study_design_scores_codex":[0.0001319505,0.00008984546,0.00118768,0.0004578853,0.00004621012,0.0003270714,0.0003004475,0.0890169,0.2962253,0.2742684,0.003384905,0.3345633],"study_design_scores_gemma":[0.00008263233,0.0006897546,0.001131909,0.0001077781,0.00007308541,0.0006135079,0.00005416086,0.5661182,0.2671322,0.0399094,0.1240362,0.00005099752],"study_design_candidate":"bench_or_experimental","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.02448517,0.0003232182,0.9655697,0.0001125771,0.00006298691,0.00013277,0.00005119901,0.00146586,0.007796383],"genre_scores_gemma":[0.2951126,0.0003342121,0.6990665,0.0001887272,0.00003704565,0.0001304537,0.0001130057,0.000154439,0.004862961],"genre_candidate":"empirical","genre_consensus":null,"teacher_disagreement_score":0.001618051,"threshold_uncertainty_score":0.005412936,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W3138924352","doi":"10.1049/cdt2.12021","title":"Static power model for CMOS and FPGA circuits","year":2021,"lang":"en","type":"article","venue":"IET Computers & Digital Techniques","topic":"Low-power high-performance VLSI design","field":"Engineering","cited_by":5,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":true,"ca_venue":false,"about_ca":false},"ca_institutions":"Toronto Metropolitan University","funders":"Natural Sciences and Engineering Research Council of Canada","keywords":"Spice; Computer science; Electronic engineering; Field-programmable gate array; CMOS; Transistor; Power (physics); Dynamic demand; Static timing analysis; Power consumption; Power analysis; Process (computing); Voltage; Embedded system; Engineering; Electrical engineering; Algorithm","authors":[{"name":"Anas Razzaq","is_ca":true},{"name":"Andy Ye","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.01093328217127548,"gpt":0.2118650168010427,"spread":0.2009317346297672,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0002108061,0.000685156,0.0003937182,0.0006629789,0.0002554055,0.0004577137,0.001085723,0.0007716388,0.005381726],"category_scores_gemma":[0.0007577524,0.0003275877,0.000749804,0.0004836974,0.0002901902,0.0007676354,0.0003159227,0.0005537094,0.00131309],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0007189374,"about_ca_system_score_gemma":0.0004196513,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.003875362,"about_ca_topic_score_gemma":0.003797501,"domain_scores_codex":[0.9997349,0.00004478644,0.000010641,0.00005513945,0.000123692,0.00003076791],"domain_scores_gemma":[0.9997807,0.00008883807,0.00002981019,0.00003398177,0.00006088475,0.000005728783],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"simulation_or_modeling","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.00002421457,0.00001804902,0.0002793633,0.00004210654,0.00001836096,0.00007016301,0.00002438165,0.9715778,0.005994971,0.009034852,0.00069753,0.0122181],"study_design_scores_gemma":[0.000001540373,0.00001447035,0.0001102437,0.000002998787,0.000004715641,0.00001678463,0.000002248508,0.9976223,0.0006426452,0.001024152,0.0005561101,0.000001856227],"study_design_candidate":"simulation_or_modeling","study_design_consensus":"simulation_or_modeling","genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.0430878,0.0009298816,0.9265613,0.0003129047,0.00008271571,0.0001006511,0.0005911533,0.001155967,0.0271777],"genre_scores_gemma":[0.9233786,0.0009987034,0.03395658,0.0002702189,0.00007450462,0.0003168849,0.0005752268,0.0002256807,0.04020349],"genre_candidate":"empirical","genre_consensus":null,"teacher_disagreement_score":0.005381726,"threshold_uncertainty_score":0.0180037,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W3137786380","doi":"10.1049/cdt2.12019","title":"Fast and low‐power leading‐one detectors for energy‐efficient logarithmic computing","year":2021,"lang":"en","type":"article","venue":"IET Computers & Digital Techniques","topic":"Numerical Methods and Algorithms","field":"Computer Science","cited_by":4,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Alberta","funders":"","keywords":"Logarithm; Multiplexer; Computation; Multiplier (economics); Binary number; Detector; Algorithm; Multiplication (music); Computer science; Scaling; Arithmetic; Mathematics; Parallel computing; Multiplexing; Combinatorics; Mathematical analysis","authors":[{"name":"Mohammad Saeed Ansari","is_ca":true},{"name":"S. Girish Gandhi","is_ca":true},{"name":"B.F. Cockburn","is_ca":true},{"name":"Jie Han","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.01212493118335639,"gpt":0.2584835012757158,"spread":0.2463585700923595,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0004875134,0.00051284,0.0003263583,0.0006309187,0.0004332406,0.001152076,0.0009598183,0.0003670414,0.004540453],"category_scores_gemma":[0.001723731,0.0002162418,0.0002280866,0.0005948495,0.0005994173,0.001354121,0.0007176176,0.0008604783,0.001094378],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0009522612,"about_ca_system_score_gemma":0.0009042705,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.0006781414,"about_ca_topic_score_gemma":0.001576004,"domain_scores_codex":[0.999624,0.00008930352,0.00002204325,0.00005795678,0.0001556736,0.00005101958],"domain_scores_gemma":[0.9994981,0.0002115168,0.00006179277,0.00007741161,0.000123438,0.00002768083],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"design_other","study_design_gemma":"bench_or_experimental","study_design_scores_codex":[0.001011729,0.0002501124,0.002295478,0.0004560911,0.00005431488,0.0004262909,0.0002985932,0.07389732,0.1996461,0.2074984,0.01080958,0.5033559],"study_design_scores_gemma":[0.0001063381,0.0004170452,0.0004641877,0.00008829647,0.00003517772,0.0003743116,0.00006280037,0.775093,0.146773,0.04153087,0.03498873,0.00006616646],"study_design_candidate":"bench_or_experimental","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.04261785,0.001133956,0.9401172,0.0004125217,0.0002027284,0.00007486108,0.00007117821,0.001753599,0.01361607],"genre_scores_gemma":[0.6363497,0.0005136288,0.3521426,0.0003598423,0.00007470686,0.00009528464,0.00008673763,0.0001034625,0.01027403],"genre_candidate":"empirical","genre_consensus":null,"teacher_disagreement_score":0.004540453,"threshold_uncertainty_score":0.01518929,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2007102977","doi":"10.1049/iet-cdt.2013.0016","title":"Temperature control in three‐network on chips using task migration","year":2013,"lang":"en","type":"article","venue":"IET Computers & Digital Techniques","topic":"Interconnection Networks and Systems","field":"Computer Science","cited_by":4,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Toronto","funders":"","keywords":"Scalability; Overhead (engineering); Network on a chip; Multiprocessing; Computer science; Chip; Interconnection; Reliability (semiconductor); Dissipation; Three-dimensional integrated circuit; System on a chip; Thermal management of electronic devices and systems; Integrated circuit; Embedded system; Power (physics); Parallel computing; Engineering; Computer network; Telecommunications","authors":[{"name":"Neda Hassanpour","is_ca":false},{"name":"Shaahin Hessabi","is_ca":false},{"name":"Parisa Khadem Hamedani","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.00968258682185651,"gpt":0.2142268469475301,"spread":0.2045442601256736,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0002956308,0.0004190315,0.0003103941,0.0002119023,0.0003752452,0.0005349197,0.000628482,0.000360703,0.0007154036],"category_scores_gemma":[0.0004749421,0.0001804545,0.0003110885,0.0001985651,0.0003435225,0.0004186115,0.0005602094,0.0003063789,0.0001275649],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0005088261,"about_ca_system_score_gemma":0.0004483271,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.002569301,"about_ca_topic_score_gemma":0.002634277,"domain_scores_codex":[0.9998404,0.00004439769,0.000007318682,0.00003935173,0.00003109842,0.00003745623],"domain_scores_gemma":[0.9997891,0.0000682256,0.00004114748,0.00003575776,0.0000411215,0.00002479378],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"simulation_or_modeling","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.0002461586,0.0001647389,0.001186711,0.0000586159,0.00004945693,0.0001413025,0.0001398917,0.8612925,0.06420513,0.005029197,0.0009854591,0.06650087],"study_design_scores_gemma":[0.00001590564,0.00008199637,0.0003854951,0.00000258468,0.000008272183,0.00002129969,0.00001459404,0.9908051,0.00622576,0.001583243,0.0008475471,0.000008120699],"study_design_candidate":"simulation_or_modeling","study_design_consensus":"simulation_or_modeling","genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.4040109,0.0004664899,0.5878673,0.0002239695,0.0001466123,0.00008687392,0.00003171801,0.001064604,0.00610155],"genre_scores_gemma":[0.9689174,0.00007103435,0.02956369,0.00005903192,0.000008474899,0.00004264157,0.00001548903,0.00003180302,0.00129036],"genre_candidate":"empirical","genre_consensus":null,"teacher_disagreement_score":0.002569301,"threshold_uncertainty_score":0.005108714,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2273070579","doi":"10.1049/iet-cdt.2015.0066","title":"Design of a novel energy efficient topology for maximum magnitude generator","year":2016,"lang":"en","type":"article","venue":"IET Computers & Digital Techniques","topic":"Numerical Methods and Algorithms","field":"Computer Science","cited_by":4,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Saskatchewan","funders":"","keywords":"Multiplexer; Computer science; Least significant bit; 4-bit; Comparator; Algorithm; Parallel computing; Verilog; Generator (circuit theory); Mathematics; Topology (electrical circuits); Computer hardware; Electronic engineering; CMOS; Multiplexing; Field-programmable gate array; Power (physics); Engineering; Electrical engineering; Voltage","authors":[{"name":"Swaminathan Kathirvel","is_ca":true},{"name":"Rajkumar Jangre","is_ca":false},{"name":"Seok‐Bum Ko","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.02859419346647149,"gpt":0.277706297829231,"spread":0.2491121043627595,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0001126998,0.000241693,0.0002882907,0.0003763285,0.0002809271,0.000582403,0.0009363055,0.0004168575,0.003629421],"category_scores_gemma":[0.0001993513,0.0001767047,0.0001913902,0.0004364369,0.0001706378,0.0006733843,0.0002422301,0.0002155173,0.0008243761],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0003453763,"about_ca_system_score_gemma":0.0002840228,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.0002019326,"about_ca_topic_score_gemma":0.0005825326,"domain_scores_codex":[0.9998658,0.00002358107,0.000009688603,0.0000328206,0.00005287032,0.00001527738],"domain_scores_gemma":[0.9998585,0.00002967851,0.00003712825,0.00001912727,0.00004469034,0.00001093925],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"bench_or_experimental","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.0005076373,0.0001467816,0.001584126,0.0007702779,0.0001171967,0.0009440936,0.0003180981,0.03786797,0.6176482,0.05085553,0.01005222,0.2791878],"study_design_scores_gemma":[0.0002289124,0.002320293,0.002687086,0.0001351406,0.0001637034,0.004797431,0.000152976,0.4472658,0.4168527,0.01314012,0.1121483,0.0001074519],"study_design_candidate":"simulation_or_modeling","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"methods","genre_scores_codex":[0.1394137,0.001041702,0.8255525,0.0006172264,0.0002820769,0.0001974703,0.0004751043,0.002079649,0.03034045],"genre_scores_gemma":[0.7854127,0.0003020688,0.2031773,0.000185822,0.00006569656,0.0001229925,0.0002443506,0.00007077351,0.01041825],"genre_candidate":"methods","genre_consensus":"methods","teacher_disagreement_score":0.003629421,"threshold_uncertainty_score":0.01214159,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W1991225420","doi":"10.1049/iet-cdt.2011.0173","title":"Contention‐aware selection strategy for application‐specific network‐on‐chip","year":2013,"lang":"en","type":"article","venue":"IET Computers & Digital Techniques","topic":"Interconnection Networks and Systems","field":"Computer Science","cited_by":3,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"McGill University","funders":"","keywords":"Computer science; Selection (genetic algorithm); Routing (electronic design automation); Network on a chip; Static routing; Network packet; Selection algorithm; Adaptive routing; Routing protocol; Computer network","authors":[{"name":"Sanaz Azampanah","is_ca":false},{"name":"Ahmad Khademzadeh","is_ca":false},{"name":"Nader Bagherzadeh","is_ca":false},{"name":"Majid Janidarmian","is_ca":true},{"name":"Reza Shojaee","is_ca":false}],"retraction":null,"screen_n_in":null,"score":{"opus":0.02258229929357752,"gpt":0.2455796995939078,"spread":0.2229974003003303,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0005034512,0.0003794247,0.0002347684,0.0005297437,0.0003817968,0.0004592497,0.000789878,0.0002154647,0.0008870896],"category_scores_gemma":[0.0009503908,0.0001347566,0.0001307489,0.0004043221,0.0003132555,0.0005861544,0.0003161185,0.0003256307,0.000157701],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.000436997,"about_ca_system_score_gemma":0.0007285949,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.001135092,"about_ca_topic_score_gemma":0.002535412,"domain_scores_codex":[0.9997497,0.00007013016,0.00001871559,0.00003798408,0.00008468014,0.00003871412],"domain_scores_gemma":[0.9994555,0.0002254086,0.00005086563,0.00008831786,0.0001362084,0.00004373073],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"design_other","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.0005719829,0.0004202722,0.004474,0.0001654539,0.00009669892,0.0003869429,0.0002324831,0.1681086,0.2555892,0.01911729,0.005504639,0.5453324],"study_design_scores_gemma":[0.00008540374,0.0003845356,0.001645685,0.00001272894,0.00006897703,0.0002502934,0.00006509243,0.9315095,0.05601044,0.004632894,0.005300703,0.00003378036],"study_design_candidate":"simulation_or_modeling","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.2123524,0.001224626,0.7791389,0.0002596572,0.0001389162,0.000158539,0.00005206091,0.001523386,0.005151404],"genre_scores_gemma":[0.9247246,0.0002545466,0.07308242,0.0001124474,0.00004115236,0.00008155187,0.00007500147,0.00004147829,0.001586795],"genre_candidate":"empirical","genre_consensus":null,"teacher_disagreement_score":0.001135092,"threshold_uncertainty_score":0.003170609,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2031883009","doi":"10.1049/iet-cdt.2013.0055","title":"Challenges and advances in Toffoli network optimisation","year":2013,"lang":"en","type":"article","venue":"IET Computers & Digital Techniques","topic":"Quantum Computing Algorithms and Architecture","field":"Computer Science","cited_by":3,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of New Brunswick","funders":"","keywords":"Template; Toffoli gate; Computer science; Heuristics; Matching (statistics); Combinatory logic; Computer engineering; Theoretical computer science; Algorithm; Quantum gate; Programming language; Mathematics; Quantum computer; Quantum","authors":[{"name":"Gerhard W. Dueck","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.009906054993092708,"gpt":0.2286296666313555,"spread":0.2187236116382628,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.00271564,0.0007404664,0.001024069,0.0008458706,0.0004522104,0.001942421,0.001586737,0.002124892,0.006411128],"category_scores_gemma":[0.005321814,0.0005283462,0.0007289803,0.001024565,0.001508512,0.004556897,0.001146429,0.002551888,0.00224253],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.001705215,"about_ca_system_score_gemma":0.0009513262,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.0006063097,"about_ca_topic_score_gemma":0.0006285285,"domain_scores_codex":[0.9988585,0.0003212981,0.00005837634,0.0001797156,0.0004850902,0.00009706717],"domain_scores_gemma":[0.9979273,0.001505049,0.00008854915,0.0002064417,0.000219094,0.00005349869],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"theoretical_or_conceptual","study_design_gemma":"bench_or_experimental","study_design_scores_codex":[0.0001269735,0.00007506864,0.000228659,0.001431211,0.00003925744,0.0001073657,0.0001540544,0.1190995,0.004959448,0.5577236,0.007567402,0.3084875],"study_design_scores_gemma":[0.00003258453,0.0001648557,0.0001611381,0.0004000513,0.00002119097,0.0002132875,0.000111278,0.2436514,0.006998531,0.5605897,0.1875967,0.00005940196],"study_design_candidate":"bench_or_experimental","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"methods","genre_scores_codex":[0.02007851,0.1948724,0.6428251,0.01901975,0.001963888,0.00009374444,0.000274093,0.0008198504,0.1200527],"genre_scores_gemma":[0.3937776,0.2154599,0.3479271,0.003105354,0.002913059,0.0002916413,0.0004985356,0.0006557016,0.03537115],"genre_candidate":"methods","genre_consensus":"methods","teacher_disagreement_score":0.006411128,"threshold_uncertainty_score":0.02144736,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W1041293701","doi":"10.1049/iet-cdt.2014.0188","title":"Accuracy‐aware processor customisation for fixed‐point arithmetic","year":2015,"lang":"en","type":"article","venue":"IET Computers & Digital Techniques","topic":"Numerical Methods and Algorithms","field":"Computer Science","cited_by":3,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":true,"ca_venue":false,"about_ca":false},"ca_institutions":"Polytechnique Montréal","funders":"Fonds Québécois de la Recherche sur la Nature et les Technologies","keywords":"Computer science; Latency (audio); Benchmark (surveying); Word (group theory); FLOPS; Microarchitecture; Fixed-point arithmetic; Fixed point; Parallel computing; Computer hardware; Floating point; Computer engineering; Arithmetic; Algorithm; Mathematics","authors":[{"name":"Shervin Vakili","is_ca":true},{"name":"J. M. Pierre Langlois","is_ca":true},{"name":"Guy Bois","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.03926840565306616,"gpt":0.3119840696708274,"spread":0.2727156640177613,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0004183647,0.0006647314,0.0003182828,0.0005710963,0.000218755,0.0005000372,0.0009276156,0.0003651048,0.002416368],"category_scores_gemma":[0.001838246,0.0002784129,0.0004528051,0.0005207562,0.0002923058,0.0008136263,0.0005173847,0.0006575916,0.0005359838],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0004097549,"about_ca_system_score_gemma":0.0004778377,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.0007079533,"about_ca_topic_score_gemma":0.001438245,"domain_scores_codex":[0.9993193,0.0001001287,0.00005100315,0.0001144722,0.0003461807,0.00006896009],"domain_scores_gemma":[0.9991516,0.0002551758,0.0001158249,0.000258304,0.0002047486,0.00001441901],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"design_other","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.0002754911,0.00008531324,0.001632297,0.0002805692,0.00005777115,0.0001610637,0.0001663845,0.2609734,0.1631131,0.008590626,0.001924757,0.5627392],"study_design_scores_gemma":[0.000060492,0.0004323537,0.001800569,0.00004521258,0.00007262239,0.0004461636,0.00005116899,0.8247566,0.1445055,0.006824875,0.02095607,0.00004838257],"study_design_candidate":"simulation_or_modeling","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.05723535,0.0006302336,0.934366,0.00007628865,0.00006682714,0.00009941303,0.00003798784,0.002174001,0.005313939],"genre_scores_gemma":[0.618502,0.0003787981,0.3759674,0.00009379917,0.00004250536,0.000125224,0.0001721101,0.0004638689,0.004254523],"genre_candidate":"empirical","genre_consensus":null,"teacher_disagreement_score":0.002416368,"threshold_uncertainty_score":0.008083582,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2108211345","doi":"10.1049/iet-cdt.2008.0155","title":"Skew compensation in energy recovery clock distribution networks","year":2009,"lang":"en","type":"article","venue":"IET Computers & Digital Techniques","topic":"Low-power high-performance VLSI design","field":"Engineering","cited_by":3,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"Concordia University","funders":"","keywords":"Clock skew; Digital clock manager; FLOPS; Clock domain crossing; Timing failure; Synchronous circuit; Clock signal; Skew; Clock network; Electronic engineering; Clock gating; Computer science; CPU multiplier; Jitter; Engineering; Parallel computing; Telecommunications","authors":[{"name":"S. E. Esmaeili","is_ca":true},{"name":"Ali Mohammadi Farhangi","is_ca":true},{"name":"A.J. Al-Khalili","is_ca":true},{"name":"Glenn Cowan","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.003651611229473612,"gpt":0.1779241009638192,"spread":0.1742724897343456,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0004724525,0.0002783721,0.0002420749,0.000366598,0.000318509,0.0005043254,0.0005413474,0.0002320377,0.001355171],"category_scores_gemma":[0.001618865,0.0001324225,0.000150748,0.0005445197,0.0002710003,0.001007474,0.0003956557,0.0003241996,0.000220809],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.000594784,"about_ca_system_score_gemma":0.0004485404,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.0005287533,"about_ca_topic_score_gemma":0.0007466332,"domain_scores_codex":[0.9996705,0.00006387715,0.00001789352,0.0000669571,0.0001321207,0.00004859109],"domain_scores_gemma":[0.9994128,0.0002303678,0.0001176872,0.00008870887,0.0001300262,0.00002049364],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"design_other","study_design_gemma":"bench_or_experimental","study_design_scores_codex":[0.0005913234,0.00008197625,0.002972958,0.0001869384,0.00003424792,0.0002082681,0.0001700056,0.4209155,0.08845221,0.04981294,0.00124424,0.4353295],"study_design_scores_gemma":[0.00004568772,0.0003079805,0.0007569866,0.00002712205,0.00003156003,0.0002287866,0.00005198519,0.9040539,0.07385608,0.01320508,0.007414551,0.00002028086],"study_design_candidate":"bench_or_experimental","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.1836023,0.000954959,0.8103207,0.0001725526,0.0000602933,0.00005596474,0.00005861655,0.0005714076,0.004203198],"genre_scores_gemma":[0.896687,0.0003924774,0.1000264,0.0000669357,0.00003405936,0.00003956475,0.00006996129,0.0000564623,0.002627082],"genre_candidate":"empirical","genre_consensus":null,"teacher_disagreement_score":0.001355171,"threshold_uncertainty_score":0.00453347,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2077045439","doi":"10.1049/iet-cdt.2012.0038","title":"High-performance low-power sensing scheme for nanoscale SRAMs","year":2012,"lang":"en","type":"article","venue":"IET Computers & Digital Techniques","topic":"Advancements in Semiconductor Devices and Circuit Design","field":"Engineering","cited_by":2,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"Concordia University","funders":"","keywords":"Static random-access memory; CMOS; Dissipation; Process variation; Overhead (engineering); Computer science; Electronic engineering; Leakage (economics); Integrated circuit; Power (physics); Reduction (mathematics); Amplifier; Electronic circuit; Leakage power; Electrical engineering; Engineering; Transistor; Voltage; Physics","authors":[{"name":"Ali Valaee","is_ca":true},{"name":"A.J. Al-Khalili","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.0106758076462873,"gpt":0.2192411296463741,"spread":0.2085653220000868,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.000110928,0.0001524359,0.0001538623,0.000120959,0.0001421469,0.00026921,0.0007303875,0.0003297058,0.001281119],"category_scores_gemma":[0.0003252953,0.0001001417,0.0001334488,0.0001165752,0.0001494443,0.0006989228,0.0001823586,0.0001877529,0.0002404651],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0001714531,"about_ca_system_score_gemma":0.0001152917,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.0001349309,"about_ca_topic_score_gemma":0.0004906822,"domain_scores_codex":[0.9998808,0.00001792077,0.00001050997,0.00003261877,0.00004696574,0.00001121748],"domain_scores_gemma":[0.9998148,0.00005232565,0.0000429687,0.00004478536,0.000037972,0.000007109575],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"bench_or_experimental","study_design_gemma":"bench_or_experimental","study_design_scores_codex":[0.0002254319,0.00007547223,0.0009308505,0.000206784,0.00003038108,0.0002534887,0.0001018,0.009216677,0.8950029,0.006357772,0.001139658,0.08645879],"study_design_scores_gemma":[0.00007854502,0.001977331,0.003182082,0.00004534493,0.00009933017,0.00193235,0.00007979599,0.2543867,0.7190053,0.004201198,0.01496738,0.00004456782],"study_design_candidate":"bench_or_experimental","study_design_consensus":"bench_or_experimental","genre_codex":"empirical","genre_gemma":"methods","genre_scores_codex":[0.5123122,0.001626798,0.4771313,0.0005966088,0.0002224592,0.0000942421,0.000139148,0.002011581,0.005865608],"genre_scores_gemma":[0.9617348,0.0001231199,0.03697327,0.00009515795,0.00002538839,0.00001237256,0.00002350238,0.00001178685,0.001000563],"genre_candidate":"methods","genre_consensus":null,"teacher_disagreement_score":0.001281119,"threshold_uncertainty_score":0.004285753,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W3163808675","doi":"10.1049/cdt2.12031","title":"Strengthened 32‐bit AES implementation: Architectural error correction configuration with a new voting scheme","year":2021,"lang":"en","type":"article","venue":"IET Computers & Digital Techniques","topic":"Cryptographic Implementations and Security","field":"Computer Science","cited_by":2,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"South Health Campus","funders":"","keywords":"Computer science; Advanced Encryption Standard; Byte; Pipeline (software); Reliability (semiconductor); Fault tolerance; Resilience (materials science); Encryption; Error detection and correction; Embedded system; Computer engineering; Distributed computing; Computer network; Computer hardware; Algorithm; Operating system","authors":[{"name":"Saeideh Sheikhpur","is_ca":false},{"name":"Mahdi Taheri","is_ca":false},{"name":"Mohammad Saeed Ansari","is_ca":true},{"name":"Ali Mahani","is_ca":false}],"retraction":null,"screen_n_in":null,"score":{"opus":0.01565170674294585,"gpt":0.2835020549238144,"spread":0.2678503481808685,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0003253316,0.0003628749,0.0002635633,0.00053424,0.0003713405,0.0005373529,0.001121659,0.0004478327,0.002298691],"category_scores_gemma":[0.0008275612,0.0001445068,0.0002449768,0.0003199708,0.0003245797,0.0007166325,0.0004206223,0.0003787897,0.0005464658],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0004263418,"about_ca_system_score_gemma":0.0005027935,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.0006205522,"about_ca_topic_score_gemma":0.0008354831,"domain_scores_codex":[0.9994441,0.0001002706,0.0000727536,0.0001154166,0.0001782364,0.00008919809],"domain_scores_gemma":[0.9992817,0.00006313585,0.0001043624,0.0003075466,0.0002154929,0.00002779258],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"bench_or_experimental","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.001570352,0.0002240524,0.003941988,0.0002065461,0.0001247063,0.00093346,0.0003062502,0.07056403,0.7003229,0.02650821,0.003175991,0.1921216],"study_design_scores_gemma":[0.0001466726,0.001081829,0.001784878,0.0000303667,0.00009840962,0.0008187174,0.00005974221,0.4469455,0.5312788,0.003983887,0.0137052,0.00006600675],"study_design_candidate":"simulation_or_modeling","study_design_consensus":null,"genre_codex":"empirical","genre_gemma":"empirical","genre_scores_codex":[0.6059538,0.0004043978,0.3784382,0.0004530167,0.0004075328,0.0002125666,0.0001454058,0.004360718,0.009624361],"genre_scores_gemma":[0.9621897,0.0000360249,0.0353856,0.00004902082,0.00001771753,0.00002330729,0.00005069909,0.00003079495,0.002217225],"genre_candidate":"empirical","genre_consensus":"empirical","teacher_disagreement_score":0.002298691,"threshold_uncertainty_score":0.007689834,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2255454767","doi":"10.1049/iet-cdt.2015.0056","title":"Evaluating fault tolerance on asymmetric multicore systems‐on‐chip using iso‐metrics","year":2015,"lang":"en","type":"article","venue":"IET Computers & Digital Techniques","topic":"Parallel Computing and Optimization Techniques","field":"Computer Science","cited_by":1,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":false,"ca_fund":true,"ca_venue":false,"about_ca":false},"ca_institutions":"","funders":"Seventh Framework Programme; European Commission; Queen's University; Ministerio de Economía y Competitividad; Federación Española de Enfermedades Raras; Engineering and Physical Sciences Research Council; Universidad Complutense de Madrid","keywords":"Emulation; Computer science; Multi-core processor; Embedded system; Fault tolerance; Frequency scaling; Implementation; Reliability (semiconductor); Energy consumption; Supercomputer; Reliability engineering; Power (physics); Distributed computing; Engineering; Parallel computing; Electrical engineering","authors":[{"name":"Charalampos Chalios","is_ca":false},{"name":"Dimitrios S. Nikolopoulos","is_ca":false},{"name":"Sandra Catalán","is_ca":false},{"name":"Enrique S. Quintana–Ort́ı","is_ca":false}],"retraction":null,"screen_n_in":null,"score":{"opus":0.1009477074361123,"gpt":0.3472739787204626,"spread":0.2463262712843503,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.001235093,0.0005795626,0.0003671756,0.0009782363,0.0003310305,0.0005263712,0.0006764237,0.0004096717,0.001102694],"category_scores_gemma":[0.006393756,0.0001666104,0.0003054182,0.0007923074,0.0004261547,0.0006833477,0.0004876649,0.0002925637,0.00009269236],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0009201632,"about_ca_system_score_gemma":0.0006932126,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.004586709,"about_ca_topic_score_gemma":0.004288526,"domain_scores_codex":[0.9993249,0.0002204896,0.00004475065,0.00008435229,0.0002207684,0.0001046996],"domain_scores_gemma":[0.9964973,0.001899248,0.000400198,0.0003918447,0.0006628648,0.0001484812],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"simulation_or_modeling","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.0002227183,0.00007119605,0.005306205,0.00005971114,0.00003296582,0.00003902382,0.00003172463,0.9582214,0.003625744,0.002299837,0.0003079507,0.02978172],"study_design_scores_gemma":[0.000006713589,0.0001822997,0.00251813,0.000004191584,0.000007212479,0.00001598487,0.00002199188,0.9931999,0.002875283,0.000977074,0.0001867279,0.000004602466],"study_design_candidate":"simulation_or_modeling","study_design_consensus":"simulation_or_modeling","genre_codex":"empirical","genre_gemma":"empirical","genre_scores_codex":[0.9431196,0.0003299319,0.05226311,0.00008859821,0.00003155294,0.00004782292,0.0001150017,0.0003753608,0.003628846],"genre_scores_gemma":[0.9909016,0.00003392388,0.00864557,0.000008287234,0.000003135006,0.00001625151,0.00008129762,0.00001591722,0.0002940284],"genre_candidate":"empirical","genre_consensus":"empirical","teacher_disagreement_score":0.004586709,"threshold_uncertainty_score":0.009119987,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2011813090","doi":"10.1049/iet-cdt:20060199","title":"Bridging fault diagnostic tool based on Δ <i>I</i> <sub>DDQ</sub> probabilistic signatures, circuit layout parasitics and logic errors","year":2007,"lang":"en","type":"article","venue":"IET Computers & Digital Techniques","topic":"VLSI and Analog Circuit Testing","field":"Computer Science","cited_by":1,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":true,"ca_venue":false,"about_ca":false},"ca_institutions":"École de Technologie Supérieure","funders":"CMC Microsystems","keywords":"Bridging (networking); Iddq testing; Parasitic extraction; Probabilistic logic; Fault coverage; Fault (geology); Computer science; Algorithm; Logic gate; Stuck-at fault; Fault detection and isolation; Engineering; Electronic engineering; Computer engineering; Reliability engineering; Electronic circuit; Electrical engineering; Artificial intelligence; CMOS","authors":[{"name":"Y. Hariri","is_ca":true},{"name":"Claude Thibeault","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.01370878887806173,"gpt":0.2326612469149626,"spread":0.2189524580369008,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0003462638,0.0006386039,0.0007328004,0.001363686,0.0002126182,0.0005251179,0.0008605775,0.000750215,0.003349352],"category_scores_gemma":[0.002028141,0.0002568137,0.0002900154,0.0005151805,0.0003360749,0.000717273,0.0006262992,0.0004893881,0.000503969],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0003692526,"about_ca_system_score_gemma":0.0004900201,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.0007422567,"about_ca_topic_score_gemma":0.0009599837,"domain_scores_codex":[0.9997688,0.00003576441,0.00001524528,0.00003835249,0.0001235639,0.00001829307],"domain_scores_gemma":[0.998979,0.000623178,0.00009271454,0.0001040836,0.000162574,0.00003843261],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"design_other","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.0004276985,0.0001369081,0.003569656,0.0003461061,0.0001379677,0.0008977072,0.000167085,0.1372337,0.1142747,0.01103098,0.005050858,0.7267267],"study_design_scores_gemma":[0.00006143708,0.0002290227,0.0008563013,0.00002840197,0.00004962177,0.001069893,0.00002882317,0.9347174,0.05439997,0.004326613,0.004198923,0.00003366205],"study_design_candidate":"simulation_or_modeling","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"methods","genre_scores_codex":[0.01900929,0.0001315633,0.9731002,0.00008048301,0.00002888912,0.00004791504,0.0001102828,0.006681162,0.0008101696],"genre_scores_gemma":[0.3150752,0.0001069708,0.682835,0.00009412101,0.00001805366,0.0001014944,0.0002179758,0.0001501223,0.001401032],"genre_candidate":"methods","genre_consensus":"methods","teacher_disagreement_score":0.003349352,"threshold_uncertainty_score":0.01120472,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2130393477","doi":"10.1049/iet-cdt.2010.0167","title":"Effect of scaling on the area and performance of the H.264/AVC full-search fractional motion estimation algorithm on field-programmable gate arrays","year":2012,"lang":"en","type":"article","venue":"IET Computers & Digital Techniques","topic":"Video Coding and Compression Technologies","field":"Computer Science","cited_by":1,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"Toronto Metropolitan University","funders":"","keywords":"Computer science; Field-programmable gate array; Algorithm; Encoder; Scalability; Motion estimation; Block (permutation group theory); Encoding (memory); Virtex; Parallel computing; Data compression; Video quality; Computer hardware; Artificial intelligence; Mathematics","authors":[{"name":"Jasmina Vasiljevic","is_ca":true},{"name":"A.G. Ye","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.01510066130385711,"gpt":0.2567706746588784,"spread":0.2416700133550213,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0004119272,0.0007505854,0.0003438422,0.0005495829,0.0001947697,0.0004719878,0.000512047,0.0004329656,0.0023785],"category_scores_gemma":[0.003553664,0.0002010254,0.0002046889,0.0008556034,0.0002135214,0.001028372,0.0002640646,0.0002318681,0.0003919715],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0003938026,"about_ca_system_score_gemma":0.0003079914,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.001224873,"about_ca_topic_score_gemma":0.0009149846,"domain_scores_codex":[0.9994695,0.00009629298,0.00006551117,0.000107096,0.0001573485,0.0001042962],"domain_scores_gemma":[0.9974789,0.001315476,0.0003088744,0.0002416203,0.000565985,0.00008901829],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"bench_or_experimental","study_design_gemma":"bench_or_experimental","study_design_scores_codex":[0.003153272,0.0004350313,0.01195258,0.0005257019,0.0001566992,0.001377897,0.0003648878,0.2122197,0.5302709,0.002655918,0.005560881,0.2313266],"study_design_scores_gemma":[0.0003491972,0.007512052,0.02649849,0.0001315912,0.0003004331,0.001727418,0.0004056922,0.4361629,0.512006,0.001126079,0.01365448,0.0001257712],"study_design_candidate":"bench_or_experimental","study_design_consensus":"bench_or_experimental","genre_codex":"empirical","genre_gemma":"empirical","genre_scores_codex":[0.9808909,0.001592143,0.01058441,0.0002098924,0.0001261975,0.00003605812,0.0001866484,0.0007796316,0.005594207],"genre_scores_gemma":[0.9903627,0.000312973,0.008122367,0.00005556733,0.00002643049,0.00002615235,0.0001816057,0.00006833791,0.0008437556],"genre_candidate":"empirical","genre_consensus":"empirical","teacher_disagreement_score":0.0023785,"threshold_uncertainty_score":0.007956862,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W4416306598","doi":"10.1049/cdt2/5384331","title":"A Systematic Literature Review on the Applications, Models, Limitations, and Future Directions of Generative Adversarial Networks","year":2025,"lang":"en","type":"article","venue":"IET Computers & Digital Techniques","topic":"Adversarial Robustness in Machine Learning","field":"Computer Science","cited_by":0,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"Université de Moncton","funders":"","keywords":"Adversarial system; Key (lock); Domain (mathematical analysis); Systematic review; Similarity (geometry); Generative grammar; Taxonomy (biology); Architecture","authors":[{"name":"Sunawar Khan","is_ca":false},{"name":"Tehseen Mazhar","is_ca":false},{"name":"Tariq Shahzad","is_ca":false},{"name":"Muhammad Amir Khan","is_ca":false},{"name":"Wasim Ahmad","is_ca":false},{"name":"Afsha Bibi","is_ca":false},{"name":"Habib Hamam","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.01106865353179942,"gpt":0.2506989948505807,"spread":0.2396303413187813,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.004635305,0.001214684,0.001606526,0.004893013,0.0004040684,0.001981034,0.001327728,0.001399454,0.004199964],"category_scores_gemma":[0.02008803,0.0007067837,0.001986419,0.004639529,0.0008336012,0.002686,0.001041346,0.001293684,0.0008456704],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.001154999,"about_ca_system_score_gemma":0.005241585,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.003461305,"about_ca_topic_score_gemma":0.006974874,"domain_scores_codex":[0.9981668,0.0005938289,0.0004147846,0.0002553477,0.0005133505,0.00005586166],"domain_scores_gemma":[0.9768931,0.02016674,0.001028484,0.0004102667,0.001379708,0.0001216198],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"design_other","study_design_gemma":"systematic_review","study_design_scores_codex":[0.0001143967,0.00008213351,0.001583152,0.1332927,0.0007798075,0.0001780282,0.0002812756,0.005597868,0.000946692,0.0192305,0.02059213,0.8173214],"study_design_scores_gemma":[0.0000609515,0.0005434885,0.004746323,0.260884,0.004757215,0.001425205,0.0006711712,0.007818473,0.002463277,0.035211,0.6812523,0.0001665456],"study_design_candidate":"systematic_review","study_design_consensus":null,"genre_codex":"review","genre_gemma":"review","genre_scores_codex":[0.00116874,0.9863491,0.007418137,0.001990187,0.0002534713,0.00008317796,0.0002876579,0.00005960992,0.002389923],"genre_scores_gemma":[0.00884216,0.9841155,0.005047707,0.0009658815,0.0002026404,0.00009905454,0.0002647366,0.00002101596,0.0004413128],"genre_candidate":"review","genre_consensus":"review","teacher_disagreement_score":0.004893013,"threshold_uncertainty_score":0.02451414,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2910067318","doi":"10.1049/iet-cdt.2018.5043","title":"Probabilistic timing analysis of time‐randomised caches with fault detection mechanisms","year":2019,"lang":"en","type":"article","venue":"IET Computers & Digital Techniques","topic":"Real-Time Systems Scheduling","field":"Computer Science","cited_by":0,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"Polytechnique Montréal","funders":"","keywords":"Computer science; Probabilistic logic; Cache; Probabilistic analysis of algorithms; Static timing analysis; Fault detection and isolation; Real-time computing; Reliability engineering; Algorithm; Parallel computing; Embedded system; Artificial intelligence; Engineering","authors":[{"name":"Chao Chen","is_ca":false},{"name":"Jacopo Panerati","is_ca":true},{"name":"Meng Li","is_ca":false},{"name":"Giovanni Beltrame","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.007505424122112765,"gpt":0.2105529691892059,"spread":0.2030475450670931,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.002098078,0.000576507,0.0006241873,0.0008356689,0.0003193527,0.0007921065,0.001327089,0.0008111502,0.0008391289],"category_scores_gemma":[0.01181766,0.000439865,0.000698273,0.0006688722,0.0006659767,0.001175559,0.0006250988,0.0008081175,0.0001362285],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.001155107,"about_ca_system_score_gemma":0.001434638,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.004314424,"about_ca_topic_score_gemma":0.002740638,"domain_scores_codex":[0.9979389,0.0006061027,0.0001203739,0.0002844043,0.0008564815,0.0001935692],"domain_scores_gemma":[0.9896902,0.007049212,0.001289082,0.0008877249,0.0009711628,0.0001125806],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"simulation_or_modeling","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.00009555982,0.00002047905,0.000857987,0.00003473741,0.00002504008,0.00002966732,0.00003238055,0.9753151,0.003717827,0.00550587,0.00008022277,0.0142851],"study_design_scores_gemma":[0.000002395084,0.0000220754,0.0001386381,0.000002036764,0.000006370283,0.00001229098,0.000001642858,0.9971665,0.001302521,0.001269613,0.00007221158,0.0000037006],"study_design_candidate":"simulation_or_modeling","study_design_consensus":"simulation_or_modeling","genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.0950266,0.000355673,0.9030396,0.0000865644,0.00002280478,0.00003382031,0.00005102066,0.0005096991,0.0008741568],"genre_scores_gemma":[0.955422,0.000137178,0.04358093,0.00003970442,0.0000227023,0.00004574547,0.00006353437,0.00004072405,0.0006474484],"genre_candidate":"empirical","genre_consensus":null,"teacher_disagreement_score":0.004314424,"threshold_uncertainty_score":0.01109588,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W2021731414","doi":"10.1049/iet-cdt.2013.0109","title":"Column selection solutions for <i>L</i> 1 data caches implemented using eight‐transistor cells","year":2014,"lang":"en","type":"article","venue":"IET Computers & Digital Techniques","topic":"Low-power high-performance VLSI design","field":"Engineering","cited_by":0,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Victoria","funders":"","keywords":"Cache; Computer science; Overhead (engineering); Transistor; Static random-access memory; Dissipation; Scaling; Selection (genetic algorithm); CPU cache; Column (typography); Voltage; Computer hardware; Embedded system; Parallel computing; Electrical engineering; Computer network; Engineering; Artificial intelligence; Mathematics; Operating system; Physics","authors":[{"name":"Mostafa Farahani","is_ca":true},{"name":"Amirali Baniasadi","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.03887342976144327,"gpt":0.2441999563159854,"spread":0.2053265265545421,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0001102913,0.0004816178,0.0002341856,0.000394579,0.0004556745,0.0005330713,0.001260543,0.0003569179,0.002957138],"category_scores_gemma":[0.0002929379,0.0002234002,0.000291239,0.0005816108,0.0001908028,0.0007100567,0.0003101779,0.0003510292,0.0006352935],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0004729292,"about_ca_system_score_gemma":0.0005173326,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.001602498,"about_ca_topic_score_gemma":0.006175491,"domain_scores_codex":[0.999871,0.0000192112,0.0000145079,0.00002109986,0.00003861082,0.00003545091],"domain_scores_gemma":[0.9996054,0.00007469096,0.0001114601,0.00007281185,0.0001118582,0.00002386729],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"bench_or_experimental","study_design_gemma":"bench_or_experimental","study_design_scores_codex":[0.0009923354,0.0003602425,0.005498449,0.0007823924,0.0002212935,0.0007431685,0.0003110296,0.0375575,0.5171819,0.01286576,0.02097555,0.4025103],"study_design_scores_gemma":[0.0003641102,0.002941913,0.004273139,0.000102415,0.0003763891,0.001304662,0.0003658467,0.3296776,0.5943563,0.00727375,0.05886309,0.0001007112],"study_design_candidate":"bench_or_experimental","study_design_consensus":"bench_or_experimental","genre_codex":"empirical","genre_gemma":"empirical","genre_scores_codex":[0.5695143,0.005708176,0.4005986,0.001219054,0.0004119588,0.0003058841,0.0005556446,0.005940116,0.01574627],"genre_scores_gemma":[0.8648653,0.0009042362,0.1249684,0.0005320818,0.0001020888,0.000153033,0.0003955586,0.00009911246,0.007980214],"genre_candidate":"empirical","genre_consensus":"empirical","teacher_disagreement_score":0.002957138,"threshold_uncertainty_score":0.009892583,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null}]}