{"meta":{"page":1,"per_page":50,"max_per_page":100,"total":6,"total_is_capped":false,"direct_labels_cover":0,"predictions_cover":6,"direct_label_status":"direct model label, unvalidated","prediction_status":"machine_predicted_unvalidated (Codex and Gemma teacher distillation)","score_status":"score_only:v0-immature-baseline (scores rank; they never assert a category)","snapshot":{"source":"OpenAlex, pinned release, all 482 partitions","release":"2026-06-24","frame_built":"2026-07-12","author_layer_release":"2026-06-26"},"query_hash":"0a973c333757","filters":{"venue":"Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451)"}},"results":[{"id":"W3145549985","doi":"10.1109/dac.2003.1218834","title":"A static pattern-independent technique for power grid voltage integrity verification","year":2004,"lang":"en","type":"article","venue":"Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451)","topic":"Low-power high-performance VLSI design","field":"Engineering","cited_by":18,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Toronto","funders":"","keywords":"Computer science; Power grid; Grid; Voltage; Power (physics); Electrical engineering; Engineering; Mathematics","authors":[{"name":"D. Kuoroussis","is_ca":true},{"name":"Farid N. Najm","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.0271399639559795,"gpt":0.2421491316090504,"spread":0.2150091676530709,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.001699016,0.0009728373,0.0007020694,0.001400179,0.001009961,0.001587604,0.001912258,0.0008360613,0.00489181],"category_scores_gemma":[0.006507435,0.0008940272,0.001788923,0.001424732,0.002045717,0.003901088,0.001966227,0.0022698,0.001294095],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.001069935,"about_ca_system_score_gemma":0.002197697,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.001206193,"about_ca_topic_score_gemma":0.00165073,"domain_scores_codex":[0.9967623,0.0005607351,0.0002495084,0.0004092114,0.001782367,0.000235839],"domain_scores_gemma":[0.9961371,0.001131768,0.0003165354,0.001697375,0.0006614678,0.00005569642],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"design_other","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.0002491708,0.0001988483,0.001758961,0.000523565,0.0001377429,0.0006398667,0.0003987977,0.08401971,0.07506935,0.3579424,0.008058968,0.4710026],"study_design_scores_gemma":[0.0001285902,0.0003877776,0.0007211139,0.0001881911,0.0001973286,0.001118337,0.0001232245,0.4887319,0.1506962,0.3076756,0.04991871,0.0001130092],"study_design_candidate":"simulation_or_modeling","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"methods","genre_scores_codex":[0.001898692,0.00004680065,0.9947437,0.00009397021,0.00002506361,0.00006961251,0.00003836189,0.001055746,0.002028061],"genre_scores_gemma":[0.2181691,0.0003518097,0.7749239,0.0003759993,0.00008956609,0.0004857257,0.0003730645,0.0007053753,0.004525624],"genre_candidate":"methods","genre_consensus":"methods","teacher_disagreement_score":0.00489181,"threshold_uncertainty_score":0.01636475,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W4242199054","doi":"10.1109/dac.2003.1219139","title":"Statistical estimation of leakage-induced power grid voltage drop considering within-die process variations","year":2004,"lang":"en","type":"article","venue":"Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451)","topic":"VLSI and Analog Circuit Testing","field":"Computer Science","cited_by":8,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Toronto","funders":"","keywords":"Die (integrated circuit); Power grid; Voltage; Voltage drop; Leakage (economics); Grid; Leakage power; Computer science; Environmental science; Electrical engineering; Electronic engineering; Power (physics); Engineering; Mechanical engineering; Transistor; Mathematics; Physics","authors":[{"name":"I.A. Ferzli","is_ca":true},{"name":"F.N. Najm","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.04336309476274766,"gpt":0.2768579591042649,"spread":0.2334948643415173,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0007924481,0.0003750818,0.0004289272,0.0008520713,0.0001257396,0.0003985372,0.0005072835,0.0003398879,0.0002943812],"category_scores_gemma":[0.01076471,0.0002626432,0.0002518719,0.0008354107,0.0002868924,0.0007365881,0.0004271851,0.0004264873,0.0001566044],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0003082046,"about_ca_system_score_gemma":0.0003594456,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.0007177349,"about_ca_topic_score_gemma":0.001102947,"domain_scores_codex":[0.9993492,0.0001511786,0.00004247265,0.000097042,0.0003174398,0.00004253203],"domain_scores_gemma":[0.9931909,0.004465058,0.000839511,0.0007294309,0.0006745213,0.0001004648],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"simulation_or_modeling","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.0003322656,0.00009046109,0.04118001,0.0001073703,0.0001180047,0.0004133362,0.0001004013,0.7882366,0.05275289,0.0047727,0.0005412608,0.1113546],"study_design_scores_gemma":[0.000003623785,0.00005167966,0.00589283,0.000002832194,0.000008684798,0.0001133417,0.000007577934,0.9821174,0.01050856,0.001177294,0.0001083836,0.000007855891],"study_design_candidate":"simulation_or_modeling","study_design_consensus":"simulation_or_modeling","genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.2790841,0.0001215463,0.7188141,0.0000571497,0.00001088188,0.00003324312,0.000227784,0.001014313,0.0006368922],"genre_scores_gemma":[0.9616405,0.0000947614,0.03746282,0.00002015231,0.0000230248,0.00003120941,0.0004616723,0.00006159946,0.0002043394],"genre_candidate":"empirical","genre_consensus":null,"teacher_disagreement_score":0.0008520713,"threshold_uncertainty_score":0.004190922,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W4252940155","doi":"10.1109/dac.2003.1219000","title":"Model order reduction of nonuniform transmission lines using integrated congruence transform","year":2004,"lang":"en","type":"article","venue":"Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451)","topic":"Model Reduction and Neural Networks","field":"Physics and Astronomy","cited_by":1,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"Carleton University","funders":"","keywords":"Orthonormal basis; Basis function; Algorithm; Computer science; Congruence (geometry); Model order reduction; Orthogonal basis; Basis (linear algebra); Mathematics; Orthonormality; Topology (electrical circuits); Mathematical optimization; Projection (relational algebra); Mathematical analysis","authors":[{"name":"E. Gad","is_ca":true},{"name":"M. Nakhla","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.05159047128044988,"gpt":0.2770223753109597,"spread":0.2254319040305098,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0004934528,0.0006137625,0.0006572238,0.0003601352,0.0003623138,0.0005996678,0.0007215005,0.0003516256,0.002728979],"category_scores_gemma":[0.001329103,0.0002435793,0.0007237762,0.0003967389,0.0005482709,0.00100013,0.0009831927,0.0008987298,0.0005986032],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0004676547,"about_ca_system_score_gemma":0.0007721669,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.001684647,"about_ca_topic_score_gemma":0.001886475,"domain_scores_codex":[0.9996716,0.00007612086,0.00001650787,0.00005971918,0.0001473772,0.00002858652],"domain_scores_gemma":[0.9997736,0.00008355251,0.00003237044,0.0000474658,0.00005009077,0.00001290336],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"simulation_or_modeling","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.0001169142,0.00006999417,0.0007322902,0.00009659056,0.00003515063,0.0002276774,0.0002033098,0.5568838,0.02975423,0.2017017,0.001741314,0.2084371],"study_design_scores_gemma":[0.00001087015,0.00003134164,0.00005783933,0.000003084933,0.000004838068,0.00003247542,0.00001338844,0.9741257,0.003338961,0.02084332,0.001532857,0.000005294751],"study_design_candidate":"simulation_or_modeling","study_design_consensus":"simulation_or_modeling","genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.005258632,0.00001602623,0.9935654,0.00002149317,0.000008223676,0.00001319638,0.00001342641,0.00009546735,0.001008225],"genre_scores_gemma":[0.3413924,0.0001604042,0.653652,0.0000548154,0.00003549454,0.000127325,0.0002009952,0.0002434247,0.004133158],"genre_candidate":"empirical","genre_consensus":null,"teacher_disagreement_score":0.002728979,"threshold_uncertainty_score":0.009129286,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W4229722470","doi":"10.1109/dac.2003.1219088","title":"Synthesizing optimal filters for crosstalk-cancellation for high-speed buses","year":2004,"lang":"en","type":"article","venue":"Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451)","topic":"Low-power high-performance VLSI design","field":"Engineering","cited_by":1,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of British Columbia","funders":"","keywords":"Crosstalk; Computer science; Electronic engineering; Performance metric; Speedup; Bandwidth (computing); Computer engineering; Algorithm; Telecommunications; Parallel computing; Engineering","authors":[{"name":"Jiaying Ren","is_ca":true},{"name":"M. Greenstreet","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.03113258825884511,"gpt":0.23741667127861,"spread":0.2062840830197649,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0005339393,0.0009800354,0.0004084989,0.0005064614,0.0003540805,0.0007963011,0.0005327892,0.0008161472,0.002740673],"category_scores_gemma":[0.001759243,0.0003683322,0.0004467142,0.0004304085,0.0004263379,0.0006896618,0.000305037,0.000559597,0.0009063334],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0007790011,"about_ca_system_score_gemma":0.0008504339,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.00108658,"about_ca_topic_score_gemma":0.002719635,"domain_scores_codex":[0.9995822,0.00009148245,0.00002593365,0.00006677106,0.0001727052,0.00006091337],"domain_scores_gemma":[0.9994468,0.0002584739,0.00009989091,0.00005198216,0.0001260701,0.00001685286],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"simulation_or_modeling","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.0002362028,0.0001610131,0.0007828954,0.0003298067,0.00008936474,0.0001393064,0.0002353698,0.4193046,0.2060191,0.04592673,0.002850557,0.3239249],"study_design_scores_gemma":[0.00006623827,0.0002422775,0.0002122011,0.0000238015,0.000034678,0.0001129401,0.00004818178,0.8834985,0.09627992,0.01354289,0.005914359,0.00002401642],"study_design_candidate":"simulation_or_modeling","study_design_consensus":"simulation_or_modeling","genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.01044763,0.00007219212,0.9874423,0.00003763312,0.00001390926,0.00002066162,0.00002090924,0.0003291056,0.001615664],"genre_scores_gemma":[0.2213506,0.0001397402,0.7761128,0.00007568741,0.00003480942,0.00009808766,0.00008409757,0.0001069399,0.001997273],"genre_candidate":"empirical","genre_consensus":null,"teacher_disagreement_score":0.002740673,"threshold_uncertainty_score":0.009168506,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W4244938795","doi":"10.1109/dac.2003.1219137","title":"Design of a 17-million gate network processor using a design factory","year":2004,"lang":"en","type":"article","venue":"Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451)","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":0,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":false,"ca_fund":false,"ca_venue":false,"about_ca":true},"ca_institutions":"","funders":"","keywords":"Factory (object-oriented programming); Computer science; Network processor; Computer network; Programming language","authors":[{"name":"G.-E. Descamps","is_ca":false},{"name":"S. Bagalkotkar","is_ca":false},{"name":"S. Ganesan","is_ca":false},{"name":"S. Iyengar","is_ca":false},{"name":"A. Pirson","is_ca":false}],"retraction":null,"screen_n_in":null,"score":{"opus":0.08659970242603296,"gpt":0.2826864506209027,"spread":0.1960867481948697,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0003680619,0.0002974728,0.0002122734,0.0001895664,0.0002908863,0.0007272491,0.0004944526,0.0003604713,0.00345796],"category_scores_gemma":[0.0003744924,0.0002311829,0.0003479935,0.0001760283,0.0001858261,0.0003611169,0.0002204808,0.0003194069,0.0009827956],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0005571675,"about_ca_system_score_gemma":0.001321206,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.001355638,"about_ca_topic_score_gemma":0.001386383,"domain_scores_codex":[0.999821,0.00003431807,0.00000998433,0.00003428687,0.00006379087,0.00003664473],"domain_scores_gemma":[0.9998837,0.00002845043,0.00001465658,0.00001808366,0.00004080361,0.00001438371],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"design_other","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.0008153056,0.0004233898,0.006635075,0.0003946115,0.0002505559,0.001207161,0.0006819263,0.2441885,0.2457069,0.06672531,0.0158899,0.4170813],"study_design_scores_gemma":[0.0006518608,0.002505828,0.004635976,0.0000914444,0.0002039966,0.001290511,0.0001767744,0.6619201,0.17123,0.01561141,0.141591,0.00009113099],"study_design_candidate":"simulation_or_modeling","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.1796845,0.0003522096,0.7876688,0.0004337266,0.0001024374,0.0003997472,0.0002191667,0.003000902,0.02813857],"genre_scores_gemma":[0.5476553,0.0002099349,0.4357421,0.0002070593,0.00002166472,0.0003630551,0.0003231427,0.000160318,0.01531734],"genre_candidate":"empirical","genre_consensus":null,"teacher_disagreement_score":0.00345796,"threshold_uncertainty_score":0.01156807,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null},{"id":"W4234208104","doi":"10.1109/dac.2003.1219120","title":"A retargetable microarchitecture simulator","year":2004,"lang":"en","type":"article","venue":"Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451)","topic":"Parallel Computing and Optimization Techniques","field":"Computer Science","cited_by":0,"is_retracted":false,"has_abstract":true,"routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false},"ca_institutions":"University of Toronto","funders":"","keywords":"Microarchitecture; Computer science; Computer architecture; Microprocessor; Instruction set; Embedded system; Branch predictor; Computer architecture simulator; Parallel computing","authors":[{"name":"Wai Sum Mong","is_ca":true},{"name":"Jianwen Zhu","is_ca":true}],"retraction":null,"screen_n_in":null,"score":{"opus":0.02517826436919297,"gpt":0.2462476084909273,"spread":0.2210693441217343,"validation_status":"score_only:v0-immature-baseline"},"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0003062863,0.0004046114,0.0003079338,0.0003282737,0.0001790237,0.0003292757,0.001103295,0.0005749996,0.003555728],"category_scores_gemma":[0.001007451,0.0003612169,0.0004533089,0.0002815131,0.0002261593,0.00049366,0.0004607187,0.0008517124,0.0007444953],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0002797748,"about_ca_system_score_gemma":0.0008856074,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.001892456,"about_ca_topic_score_gemma":0.002381612,"domain_scores_codex":[0.9998224,0.00002634893,0.00001236897,0.00002101221,0.00009733446,0.00002040091],"domain_scores_gemma":[0.9995919,0.0001447926,0.00003911058,0.0001039307,0.000093773,0.00002657449],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"simulation_or_modeling","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.000115724,0.00008709051,0.001461348,0.0001308154,0.00005797695,0.0002081278,0.00012287,0.8762872,0.05012487,0.02308329,0.006426302,0.0418944],"study_design_scores_gemma":[0.00003375906,0.00005147455,0.0002362233,0.000003932356,0.00001305308,0.00004098336,0.000004163921,0.9784388,0.008596759,0.002138468,0.01043374,0.000008527417],"study_design_candidate":"simulation_or_modeling","study_design_consensus":"simulation_or_modeling","genre_codex":"methods","genre_gemma":"methods","genre_scores_codex":[0.1271199,0.0002943631,0.8322159,0.0002654315,0.0001822665,0.0003308266,0.002396519,0.02029848,0.01689627],"genre_scores_gemma":[0.4435143,0.0004931947,0.5333041,0.0001745526,0.00004450986,0.0006790631,0.004370859,0.001266982,0.01615247],"genre_candidate":"methods","genre_consensus":"methods","teacher_disagreement_score":0.003555728,"threshold_uncertainty_score":0.01189506,"prediction_status":"machine_predicted_unvalidated"},"labels":[],"label_agreement":null}]}