{"id":"W1958945689","doi":"10.1109/hpca.1998.650541","title":"The potential for using thread-level data speculation to facilitate automatic parallelization","year":2002,"lang":"en","type":"article","venue":"","topic":"Parallel Computing and Optimization Techniques","field":"Computer Science","cited_by":347,"is_retracted":false,"has_abstract":true,"ca_institutions":"","funders":"Natural Sciences and Engineering Research Council of Canada","keywords":"Computer science; Compiler; Parallel computing; Speculation; Thread (computing); Speculative multithreading; Correctness; Exploit; Cache coherence; Cache; Multithreading; Speculative execution; Multiprocessing; Chip; Computer architecture; CPU cache; Programming language; Cache algorithms","routes":{"ca_aff":false,"ca_fund":true,"ca_venue":false,"about_ca":false,"invisible_to_affiliation_only":true},"retraction":null,"screen":null,"machine_scores":{"provisional":true,"baseline":true,"maturity_gate_passed":false,"score_opus":0.223990135150863,"score_gpt":0.320554106465231,"score_spread":0.09656397131436803,"validation_status":"score_only:v0-immature-baseline","note":"Baseline scores from an immature model (maturity gate not passed). Scores rank; they never assert a category."}}