{"id":"W1991075467","doi":"10.1109/tvlsi.2011.2178046","title":"Statistical SRAM Read Access Yield Improvement Using Negative Capacitance Circuits","year":2011,"lang":"en","type":"article","venue":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","topic":"Low-power high-performance VLSI design","field":"Engineering","cited_by":8,"is_retracted":false,"has_abstract":true,"ca_institutions":"University of Waterloo","funders":"","keywords":"Static random-access memory; Access time; CMOS; Capacitance; Electronic circuit; Electronic engineering; Computer science; Process variation; Noise margin; Parasitic capacitance; Block (permutation group theory); Chip; Computer hardware; Electrical engineering; Engineering; Voltage; Transistor; Mathematics","routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false,"invisible_to_affiliation_only":false},"retraction":null,"screen":null,"direct_labels":[],"prediction":{"model_version":"codex-gemma-dda1882f352a","candidate_categories":["metaepi_narrow"],"consensus_categories":[],"category_scores_codex":[0.000358104,0.0004758837,0.0004704953,0.0003649901,0.0002888804,0.0002180341,0.0003736899,0.0002820285,0.0004202168],"category_scores_gemma":[0.00001644978,0.0004563572,0.0001333702,0.0005406211,0.00009169158,0.001355513,0.000002037724,0.0006286787,0.0001955669],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0006196265,"about_ca_system_score_gemma":0.00007839892,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.0005935366,"about_ca_topic_score_gemma":0.0004726404,"domain_scores_codex":[0.9974064,0.0001017049,0.0008113219,0.0005111957,0.0005366034,0.0006327654],"domain_scores_gemma":[0.9986945,0.0001682952,0.0001349335,0.0005574074,0.0002332446,0.0002115927],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"bench_or_experimental","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.0005495483,0.002630992,0.0005046846,0.00198622,0.001736415,0.0001643101,0.03382706,0.4333627,0.4474776,0.003505289,0.005477632,0.06877759],"study_design_scores_gemma":[0.001033853,0.0003738692,0.0002635141,0.0007914306,0.0001638415,0.000046762,0.002425791,0.5138425,0.4796405,0.0001185097,0.0002805896,0.001018949],"study_design_candidate":"simulation_or_modeling","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"empirical","genre_scores_codex":[0.1357235,0.00005328551,0.8551152,0.000006775967,0.004808925,0.0008527628,0.0004507442,0.0005040725,0.002484782],"genre_scores_gemma":[0.9975752,0.00003481456,0.00143521,0.00005035735,0.0001583192,0.0003037379,0.00001595184,0.00009799129,0.0003283661],"genre_candidate":"empirical","genre_consensus":null,"teacher_disagreement_score":0.8618518,"threshold_uncertainty_score":0.9997888,"prediction_status":"machine_predicted_unvalidated"},"machine_scores":{"provisional":true,"baseline":true,"maturity_gate_passed":false,"score_opus":0.04868174557256934,"score_gpt":0.2535724885650382,"score_spread":0.2048907429924688,"validation_status":"score_only:v0-immature-baseline","note":"Baseline scores from an immature model (maturity gate not passed). Scores rank; they never assert a category."}}