{"id":"W2064449682","doi":"10.1109/fpt.2014.7082746","title":"Design re-use for compile time reduction in FPGA high-level synthesis flows","year":2014,"lang":"en","type":"article","venue":"","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":21,"is_retracted":false,"has_abstract":true,"ca_institutions":"University of Toronto","funders":"","keywords":"Computer science; Macro; High-level synthesis; Placement; Compiler; Compile time; Reduction (mathematics); Routing (electronic design automation); Field-programmable gate array; Key (lock); Design flow; Embedded system; Logic synthesis; Abstraction; Physical design; Algorithm; Logic gate; Programming language; Operating system; Circuit design","routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false,"invisible_to_affiliation_only":false},"retraction":null,"screen":null,"direct_labels":[],"prediction":{"model_version":"metacan-v3-hybrid-931329e0061c","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0009866162,0.0009842573,0.0003910416,0.0009848914,0.0004170839,0.001088256,0.0007270382,0.0003690351,0.006495422],"category_scores_gemma":[0.002947138,0.0004006441,0.0006206749,0.0005068663,0.0003434327,0.0008527763,0.0005539223,0.0006610822,0.001564114],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0009414079,"about_ca_system_score_gemma":0.001581255,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.001695869,"about_ca_topic_score_gemma":0.004017138,"domain_scores_codex":[0.9988696,0.0004070306,0.00006417876,0.0001119739,0.0003898538,0.0001573755],"domain_scores_gemma":[0.9975967,0.001065694,0.0002408367,0.0007226664,0.0003235596,0.00005057926],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"design_other","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.0006375599,0.0002444825,0.004480072,0.0004481495,0.00006993553,0.0003503686,0.000299975,0.2045051,0.1696357,0.01161277,0.007329636,0.6003863],"study_design_scores_gemma":[0.000155017,0.0006255585,0.004237125,0.00007903115,0.0001361927,0.0003233944,0.000168645,0.7228458,0.2321748,0.006572493,0.03263504,0.00004690987],"study_design_candidate":"simulation_or_modeling","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"methods","genre_scores_codex":[0.1965473,0.001295757,0.7593564,0.0006040771,0.0001727315,0.0003118653,0.0003178877,0.01826309,0.02313083],"genre_scores_gemma":[0.5894555,0.0004500606,0.3992098,0.0002899202,0.00004838663,0.0001806493,0.0004844199,0.001633213,0.008247961],"genre_candidate":"methods","genre_consensus":"methods","teacher_disagreement_score":0.006495422,"threshold_uncertainty_score":0.02172935,"prediction_status":"machine_predicted_unvalidated"},"machine_scores":{"provisional":true,"baseline":true,"maturity_gate_passed":false,"score_opus":0.06776109320281337,"score_gpt":0.260432107418599,"score_spread":0.1926710142157856,"validation_status":"score_only:v0-immature-baseline","note":"Baseline scores from an immature model (maturity gate not passed). Scores rank; they never assert a category."}}