{"id":"W2064449682","doi":"10.1109/fpt.2014.7082746","title":"Design re-use for compile time reduction in FPGA high-level synthesis flows","year":2014,"lang":"en","type":"article","venue":"","topic":"Embedded Systems Design Techniques","field":"Computer Science","cited_by":21,"is_retracted":false,"has_abstract":true,"ca_institutions":"University of Toronto","funders":"","keywords":"Computer science; Macro; High-level synthesis; Placement; Compiler; Compile time; Reduction (mathematics); Routing (electronic design automation); Field-programmable gate array; Key (lock); Design flow; Embedded system; Logic synthesis; Abstraction; Physical design; Algorithm; Logic gate; Programming language; Operating system; Circuit design","routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false,"invisible_to_affiliation_only":false},"retraction":null,"screen":null,"direct_labels":[],"prediction":{"model_version":"codex-gemma-dda1882f352a","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.001724035,0.0001823979,0.0003095795,0.0002565449,0.00008141751,0.0001850514,0.0007967795,0.0001403,0.00003179055],"category_scores_gemma":[0.0003261346,0.0001672794,0.00006349354,0.0003243384,0.00002470205,0.0008165161,0.000103082,0.0000928274,0.000133909],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.0001237615,"about_ca_system_score_gemma":0.00004495325,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.0001989491,"about_ca_topic_score_gemma":0.00001913989,"domain_scores_codex":[0.9980708,0.0004399911,0.0004110499,0.0005197299,0.0002274369,0.0003309753],"domain_scores_gemma":[0.9977834,0.00104569,0.0001182427,0.0008627596,0.0001162702,0.00007365283],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"bench_or_experimental","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.0001733638,0.0005992739,0.000101931,0.0001983952,0.00008597497,0.000009491882,0.002248291,0.003344622,0.4010679,0.1649205,0.2492752,0.1779751],"study_design_scores_gemma":[0.000348041,0.0002545516,0.0002099223,0.0001214194,0.000009090542,0.00002194299,0.00001505839,0.5578462,0.417289,0.02100444,0.002416437,0.0004638909],"study_design_candidate":"bench_or_experimental","study_design_consensus":null,"genre_codex":"methods","genre_gemma":"methods","genre_scores_codex":[0.002649978,0.000006863744,0.9942163,0.0003944502,0.0002182311,0.0008466527,0.000002974693,0.0007857765,0.0008787297],"genre_scores_gemma":[0.3723193,0.000001885013,0.6260601,0.000075188,0.00006918603,0.0002705921,0.000001563639,0.00001755114,0.001184664],"genre_candidate":"methods","genre_consensus":"methods","teacher_disagreement_score":0.5545016,"threshold_uncertainty_score":0.6821454,"prediction_status":"machine_predicted_unvalidated"},"machine_scores":{"provisional":true,"baseline":true,"maturity_gate_passed":false,"score_opus":0.06776109320281337,"score_gpt":0.260432107418599,"score_spread":0.1926710142157856,"validation_status":"score_only:v0-immature-baseline","note":"Baseline scores from an immature model (maturity gate not passed). Scores rank; they never assert a category."}}