{"id":"W2117475675","doi":"10.1109/isvlsi.2009.23","title":"Comparative Analysis of Timing Yield Improvement under Process Variations of Flip-Flops Circuits","year":2009,"lang":"en","type":"article","venue":"","topic":"Low-power high-performance VLSI design","field":"Engineering","cited_by":21,"is_retracted":false,"has_abstract":true,"ca_institutions":"University of Waterloo","funders":"","keywords":"FLOPS; Flip-flop; Overhead (engineering); Computer science; Power–delay product; Power (physics); CMOS; Transmission gate; Process (computing); Logic gate; Electronic circuit; Electronic engineering; Parallel computing; Engineering; Transistor; Electrical engineering; Adder; Voltage","routes":{"ca_aff":true,"ca_fund":false,"ca_venue":false,"about_ca":false,"invisible_to_affiliation_only":false},"retraction":null,"screen":null,"direct_labels":[],"prediction":{"model_version":"codex-gemma-dda1882f352a","candidate_categories":[],"consensus_categories":[],"category_scores_codex":[0.0001121824,0.0001331568,0.0003837608,0.0003722342,0.00003004426,0.00001094884,0.0001473631,0.00005605122,0.0002209474],"category_scores_gemma":[0.000008231712,0.000122616,0.00008345037,0.001247139,0.00001848419,0.0001941849,0.000008429546,0.00007984901,0.000007376932],"about_ca_system_candidate":false,"about_ca_system_consensus":false,"about_ca_system_score_codex":0.00005151307,"about_ca_system_score_gemma":0.00002837241,"about_ca_topic_candidate":false,"about_ca_topic_consensus":false,"about_ca_topic_score_codex":0.00002202943,"about_ca_topic_score_gemma":0.00003162031,"domain_scores_codex":[0.9990646,0.000007205957,0.000395176,0.0001361249,0.0002195288,0.0001774088],"domain_scores_gemma":[0.9994552,0.00006109481,0.00008127182,0.0002279152,0.0001313423,0.00004324875],"domain_codex":null,"domain_gemma":null,"domain_candidate":null,"domain_consensus":null,"study_design_codex":"simulation_or_modeling","study_design_gemma":"simulation_or_modeling","study_design_scores_codex":[0.000004168328,0.0001280892,0.0007054316,0.0000626745,0.001309716,3.950893e-7,0.003445551,0.8661417,0.1228601,0.002840726,0.0002274616,0.002273918],"study_design_scores_gemma":[0.0003204896,0.000176699,0.04159604,0.00004117466,0.0007652998,3.303875e-7,0.0006681745,0.59385,0.362008,0.0002682586,0.00001864951,0.0002867946],"study_design_candidate":"simulation_or_modeling","study_design_consensus":"simulation_or_modeling","genre_codex":"empirical","genre_gemma":"empirical","genre_scores_codex":[0.6980914,0.00005901929,0.2771626,0.00004322481,0.00009666311,0.0002733582,0.00001836369,0.0001514174,0.02410396],"genre_scores_gemma":[0.9988461,0.000007999883,0.0009602466,0.0000411765,0.0000151147,0.000009812479,0.00001209433,0.000007201011,0.0001002991],"genre_candidate":"empirical","genre_consensus":"empirical","teacher_disagreement_score":0.3007547,"threshold_uncertainty_score":0.5000136,"prediction_status":"machine_predicted_unvalidated"},"machine_scores":{"provisional":true,"baseline":true,"maturity_gate_passed":false,"score_opus":0.03122423366061249,"score_gpt":0.269736164529795,"score_spread":0.2385119308691825,"validation_status":"score_only:v0-immature-baseline","note":"Baseline scores from an immature model (maturity gate not passed). Scores rank; they never assert a category."}}