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Record W1538922477 · doi:10.1109/cicc.2003.1249356

SoC implementation issues for synthesizable embedded programmable logic cores

2004· article· en· W1538922477 on OpenAlex

Why this work is in the frame

A frame that forgets how it found something cannot be audited. These are the routes that admitted this work.

affAt least one author lists a Canadian institution in the pinned OpenAlex snapshot.

Bibliographic record

Venuenot available
Typearticle
Languageen
FieldComputer Science
TopicEmbedded Systems Design Techniques
Canadian institutionsUniversity of British Columbia
Fundersnot available
KeywordsComputer scienceProgrammable logic deviceSimple programmable logic deviceLogic synthesisProgrammable Array LogicProgrammable logic arrayOverhead (engineering)Computer architectureLogic optimizationEmbedded systemErasable programmable logic deviceLogic gateComplex programmable logic deviceLogic familyProgramming languageAlgorithm

Abstract

fetched live from OpenAlex

As integrated circuits have become more and more complex, the ability to make post-fabrication changes will become more and more attractive. This ability can be realized using programmable logic cores. Currently, such cores are available from vendors in the form of a "hard" layout. An alternative approach is to use a "soft", or synthesizable programmable logic core that can be synthesized using standard library cells. In this paper, we describe the design of an integrated circuit that incorporates such a synthesizable programmable logic core. We focus on implementation issues that arose; specifically, the choice of core size, the connection of the core to the rest of the integrated circuit, and clock tree synthesis. We also present area and delay overhead results.

Fetched live from OpenAlex and de-inverted. Abstracts are not stored in this database: the inverted indexes are 8.6 GB of the frame’s 9.3 GB of text, and the host has 13 GB free.

Full frame distilled prediction

Teacher imitation

Not calibrated prevalence, not ground truth. Human validation pending. Learned from the 10,348 direct Codex labels and 10,348 direct Gemma labels. Candidate is the union of thresholded teacher heads; consensus is their intersection. These outputs are machine_predicted_unvalidated and are not human labels or direct frontier model labels.

metaresearch head score (Codex)0.001
metaresearch head score (Gemma)0.000
Version: codex-gemma-dda1882f352aValidation status: machine_predicted_unvalidated
Candidate categoriesnone
Consensus categoriesnone
DomainCandidate signal: none · Consensus signal: none
Study designCandidate signal: Theoretical or conceptual · Consensus signal: none
GenreCandidate signal: Methods · Consensus signal: Methods
Teacher disagreement score0.648
Threshold uncertainty score0.587

Codex and Gemma teacher scores by category

CategoryCodexGemma
Metaresearch0.0010.000
Meta-epidemiology (narrow)0.0000.000
Meta-epidemiology (broad)0.0000.000
Bibliometrics0.0000.000
Science and technology studies0.0000.000
Scholarly communication0.0000.001
Open science0.0010.000
Research integrity0.0000.000
Insufficient payload (model declined to judge)0.0000.000

Machine scores (provisional)

The two teacher heads of the student model, read on this work. A score orders the frame for review; it never asserts a category, and the validation status ships verbatim with every row.

Baseline scores from an immature model (maturity gate not passed, 7 training rounds). Scores rank; they never assert a category.

Opus teacher head0.040
GPT teacher head0.360
Teacher spread0.320 · how far apart the two teachers sit on this one work
Validation statusscore_only:v0-immature-baseline · verbatim from the scoring run: score_only means the number may rank works, and no category label ships from it

Quick stats

Citations13
Published2004
Admission routes1
Has abstractyes

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