MétaCan
Menu
Back to cohort
Record W1970019860 · doi:10.1049/iet-cdt.2010.0024

Reordering the assembly instructions in basic blocks to reduce switching activities on the instruction bus

2011· article· en· W1970019860 on OpenAlexaff
Noureddine Chabini, Marilyn Wolf

Bibliographic record

VenueIET Computers & Digital Techniques · 2011
Typearticle
Languageen
FieldComputer Science
TopicParallel Computing and Optimization Techniques
Canadian institutionsRoyal Military College of Canada
Fundersnot available
KeywordsHeuristicsOperandComputer scienceParallel computingInteger (computer science)Power (physics)Reduction (mathematics)ComputationInteger programmingEmbedded systemCode (set theory)DissipationComputer hardwareProgramming languageAlgorithmOperating systemMathematics

Abstract

fetched live from OpenAlex

Execution time is no longer the only target to achieve when designing programmes for today and next-generation CMOS-based digital systems. One needs to also consider reducing power dissipation. Buses contribute to the power dissipation during the execution of a given programme since instructions and/or operands have to be fetched from the memory. Reducing power dissipation in buses has been addressed in the literature. In this study, the authors address the problem of reducing power dissipation of the instruction bus by reordering the instructions in basic blocks without increasing the executing time and the code size, and while maintaining the original functionality of the programme. The authors target embedded processors having Harvard architecture. They focus on solving this problem for programmes developed at the assembly level, since at that level the machine code can be obtained by simply running an assembler, which allows an accurate computation of switching activities on the instruction bus by considering each pair of instructions. The authors formulate this problem as an integer linear programme (ILP), and they provide two heuristics. Experimental results have shown that the proposed approach can reduce switching activities. The ILP has reduced switching activities by as high as 38%. One of the two proposed heuristics has always resulted in reducing switching activities, and its relative savings are within an average of 5% from the optimum produced using the ILP.

Fetched live from OpenAlex and de-inverted. Abstracts are not stored in this database: the inverted indexes are 8.6 GB of the frame’s 9.3 GB of text, and the host has 13 GB free.

How this classification was reachedexpand

Full frame machine prediction

Teacher imitation

Not calibrated prevalence, not ground truth. Human validation pending. The Gemma side is a direct model label for every work in the frame, read from the title-only record. The Codex side is a classifier learned from the 10,348 direct Codex labels and calibrated to design-weighted sample rates; fields without enough sample support carry no Codex call. Candidate is the union of the two sides; consensus is their intersection. These outputs are machine_predicted_unvalidated and are not human labels.

metaresearch head score (Codex)0.000
metaresearch head score (Gemma)0.001
Version: metacan-v3-hybrid-931329e0061cValidation status: machine_predicted_unvalidated
Candidate categoriesnone
Consensus categoriesnone
DomainCandidate signal: none · Consensus signal: none
Study designCandidate signal: Simulation or modeling · Consensus signal: none
GenreCandidate signal: Empirical · Consensus signal: none
Teacher disagreement score0.004
Threshold uncertainty score0.012

Distilled classifier scores by category (both heads)

CategoryCodexGemma
Metaresearch0.0000.001
Meta-epidemiology (narrow)0.0010.000
Meta-epidemiology (broad)0.0010.000
Bibliometrics0.0010.001
Science and technology studies0.0000.000
Scholarly communication0.0010.001
Open science0.0010.000
Research integrity0.0000.001
Insufficient payload (model declined to judge)0.0040.001

Machine scores (provisional)

The two teacher heads of the student model, read on this work. A score orders the frame for review; it never asserts a category, and the validation status ships verbatim with every row.

Baseline scores from an immature model (maturity gate not passed, 7 training rounds). Scores rank; they never assert a category.

Opus teacher head0.026
GPT teacher head0.245
Teacher spread0.219 · how far apart the two teachers sit on this one work
Validation statusscore_only:v0-immature-baseline · verbatim from the scoring run: score_only means the number may rank works, and no category label ships from it

Classification

machine, unvalidated

Machine predicted; a candidate call from one source (direct Gemma or distilled Codex), not a consensus.

The models applied no category: nothing in the taxonomy fit this work.
Study designSimulation or modeling
Domainnot available
GenreEmpirical

How this classification was reached, model by model and score by score, is at the end of the page under "How this classification was reached".

Quick stats

Citations6
Published2011
Admission routes1
Has abstractyes

Explore more

Same venueIET Computers & Digital TechniquesSame topicParallel Computing and Optimization TechniquesFrench-language works237,207