Embedded power-aware cycle by cycle variable speed processor
Why this work is in the frame
A frame that forgets how it found something cannot be audited. These are the routes that admitted this work.
Bibliographic record
Abstract
A variable speed processor (VSP) that can adjust its clock period at each cycle, according to the instruction flow in a pipelined program, is presented. This allows performance enhancement and energy consumption reduction, which is an important consideration for the next generation of embedded processor designs. With little change to the standard synchronous design, speed can be enhanced without increasing energy or speed can be maintained with energy savings. The VSP concept is validated by coupling a Nios® processor with a variable period clock synthesiser (VPCS). No modifications to the core other than extracting internal signals from the pipeline are needed to control the VPCS. The VPCS cleanly switches between period lengths at each cycle, over a wide range of possible lengths and with any resolution depending on available clock phases. One VPCS design, in CMOS 0.18 µm, consumes less than 10 µW/MHz and is able to instantly switch inside the 4–250 MHz range. The VSP design is implemented with the Altera® Embedded System platform, in its Stratix® FPGA. With the proposed method, the dynamic energy consumed per program loop is reduced by 14%, while the processing time is reduced by 3.6% compared to the original standard Nios® processor running the same program at its maximum frequency (133 MHz).
Fetched live from OpenAlex and de-inverted. Abstracts are not stored in this database: the inverted indexes are 8.6 GB of the frame’s 9.3 GB of text, and the host has 13 GB free.
Full frame distilled prediction
Teacher imitationNot calibrated prevalence, not ground truth. Human validation pending. Learned from the 10,348 direct Codex labels and 10,348 direct Gemma labels. Candidate is the union of thresholded teacher heads; consensus is their intersection. These outputs are machine_predicted_unvalidated and are not human labels or direct frontier model labels.
Codex and Gemma teacher scores by category
| Category | Codex | Gemma |
|---|---|---|
| Metaresearch | 0.000 | 0.000 |
| Meta-epidemiology (narrow) | 0.000 | 0.000 |
| Meta-epidemiology (broad) | 0.000 | 0.000 |
| Bibliometrics | 0.000 | 0.001 |
| Science and technology studies | 0.000 | 0.000 |
| Scholarly communication | 0.002 | 0.002 |
| Open science | 0.001 | 0.001 |
| Research integrity | 0.000 | 0.000 |
| Insufficient payload (model declined to judge) | 0.000 | 0.000 |
Machine scores (provisional)
The two teacher heads of the student model, read on this work. A score orders the frame for review; it never asserts a category, and the validation status ships verbatim with every row.
Baseline scores from an immature model (maturity gate not passed, 7 training rounds). Scores rank; they never assert a category.
score_only:v0-immature-baseline · verbatim from the scoring run: score_only means the number may rank works, and no category label ships from it