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Record W3138924352 · doi:10.1049/cdt2.12021

Static power model for CMOS and FPGA circuits

2021· article· en· W3138924352 on OpenAlex

Why this work is in the frame

A frame that forgets how it found something cannot be audited. These are the routes that admitted this work.

affAt least one author lists a Canadian institution in the pinned OpenAlex snapshot.
fundA Canadian funder is recorded on the work.

Bibliographic record

VenueIET Computers & Digital Techniques · 2021
Typearticle
Languageen
FieldEngineering
TopicLow-power high-performance VLSI design
Canadian institutionsToronto Metropolitan University
FundersNatural Sciences and Engineering Research Council of Canada
KeywordsSpiceComputer scienceElectronic engineeringField-programmable gate arrayCMOSTransistorPower (physics)Dynamic demandStatic timing analysisPower consumptionPower analysisProcess (computing)VoltageEmbedded systemEngineeringElectrical engineeringAlgorithm

Abstract

fetched live from OpenAlex

Abstract In Ultra‐Low‐Power (ULP) applications, power consumption is a key parameter for process independent architectural level design decisions. Traditionally, time‐consuming Spice simulations are used to measure the static power consumption. Herein, a technology‐independent static power estimation model is presented, which can estimate static power with reasonable accuracy in much less time. It is shown that active area only is not a good indicator for static power consumption, hence in this model, the effects of transistor sizing, transistor stacking, gate boosting and voltage change are considered. The procedure to apply this model to processors and FPGAs is demonstrated. Across different process technologies, compared to traditional spice simulation, this model can estimate the static power consumption of processor with an error of 1%–4%, while static power consumption of an FPGA system with an error of 1%–15%.

Fetched live from OpenAlex and de-inverted. Abstracts are not stored in this database: the inverted indexes are 8.6 GB of the frame’s 9.3 GB of text, and the host has 13 GB free.

Full frame distilled prediction

Teacher imitation

Not calibrated prevalence, not ground truth. Human validation pending. Learned from the 10,348 direct Codex labels and 10,348 direct Gemma labels. Candidate is the union of thresholded teacher heads; consensus is their intersection. These outputs are machine_predicted_unvalidated and are not human labels or direct frontier model labels.

metaresearch head score (Codex)0.000
metaresearch head score (Gemma)0.000
Version: codex-gemma-dda1882f352aValidation status: machine_predicted_unvalidated
Candidate categoriesnone
Consensus categoriesnone
DomainCandidate signal: none · Consensus signal: none
Study designCandidate signal: Simulation or modeling · Consensus signal: none
GenreCandidate signal: Methods · Consensus signal: none
Teacher disagreement score0.912
Threshold uncertainty score0.993

Codex and Gemma teacher scores by category

CategoryCodexGemma
Metaresearch0.0000.000
Meta-epidemiology (narrow)0.0000.000
Meta-epidemiology (broad)0.0000.000
Bibliometrics0.0000.000
Science and technology studies0.0000.000
Scholarly communication0.0000.001
Open science0.0000.000
Research integrity0.0000.000
Insufficient payload (model declined to judge)0.0000.000

Machine scores (provisional)

The two teacher heads of the student model, read on this work. A score orders the frame for review; it never asserts a category, and the validation status ships verbatim with every row.

Baseline scores from an immature model (maturity gate not passed, 7 training rounds). Scores rank; they never assert a category.

Opus teacher head0.011
GPT teacher head0.212
Teacher spread0.201 · how far apart the two teachers sit on this one work
Validation statusscore_only:v0-immature-baseline · verbatim from the scoring run: score_only means the number may rank works, and no category label ships from it