TEACHING INTERFACING FOR REAL-TIME SYSTEMS: NOW AND TOMORROW
Notice bibliographique
Résumé
Teaching undergraduate students about interfacing of microprocessors and microcontrollers in real-time systems is challenging because the circuits have moved from medium to increasingly higher frequencies (multimega- and giga hertz), while wired interfacing has been augmented with wireless interfacing. This paper describes an attempt to accommodate the changes in an undergraduate course called Microprocessor Interfacing (µI) that has been offered at the University of Manitoba for many years now [1-4].The course presents real-time wired and wireless interfacing of microcontrollers, microprocessors, and microcomputers to the external world, including interfacing of input/output (I/O) devices with minimum hardware and software, as well as data acquisition with and without microprocessors, data communications, transmission and logging with embedded computers. The following topics are covered: (i) introduction on computing, architectures, processors, and technologies, (ii) architecture and organization of small computer buses, and synchronization of data transfers on local buses (iii) digital input and output (I/O), (iv) digital-to-analog (D/A) and analog-to-digital (A/D) signal conversions and converters, (v) and interfacing aspects in data communications, including encoding, modulation, error detection and forward error protection. The course also includes (a) demonstrations of bus architectures, modules, systems, and new devices, as well as (b) updates on new concepts, technologies, protocols, and software. The laboratories are innovative in terms of three levels of complexity: the Tier1 level includes five 3-hour standard labs designed for all students, the Tier2 is designed for more experienced students, and the Tier3 level lab is designed as a project for groups of students with demonstrated prior design and implementation experience [3].Tomorrow’s teaching will require a deeper exposure to high-speed circuits, as the impact of the distributed nature of signals in circuits increases due to the circuit interconnections acting as transmission lines. This requires software-based simulation and emulation of designs. Embedded systems on a chip may mitigate the problem to a degree. Course laboratories may also change because of the inexpensive equipment such as logic analyzers, protocol analyzers [5], and computer-based digital oscilloscopes. Since the test cost of such equipment is within a range of a student, laboratories-athome may also become a reality.The paper provides a description of a class structure of an interfacing course today, and identifies changes required by future material in such as course. An example of an implementation of a change is also provided.
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Scores Codex et Gemma par catégorie
| Catégorie | Codex | Gemma |
|---|---|---|
| Métarecherche | 0,001 | 0,000 |
| Méta-épidémiologie (sens strict) | 0,000 | 0,000 |
| Méta-épidémiologie (sens large) | 0,000 | 0,000 |
| Bibliométrie | 0,000 | 0,000 |
| Études des sciences et des technologies | 0,000 | 0,000 |
| Communication savante | 0,000 | 0,000 |
| Science ouverte | 0,000 | 0,000 |
| Intégrité de la recherche | 0,000 | 0,000 |
| Charge utile insuffisante (le modèle a refusé de juger) | 0,000 | 0,000 |
Scores machine (provisoires)
Les deux têtes enseignantes du modèle étudiant, lues sur ce travail. Un score ordonne la base pour la relecture; il n'affirme jamais une catégorie, et le statut de validation accompagne chaque rangée tel quel.
Scores de référence d'un modèle non mature (critères de maturité non atteints, 7 itérations). Un score ordonne; il n'affirme jamais une catégorie.
score_only:v0-immature-baseline · tel quel depuis la passe de notation : score_only signifie que le nombre peut ordonner les travaux, et qu'aucune étiquette de catégorie n'en découleClassification
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