(Invited) Transparent Top Gate Oxide TFT with ITO/Ag/ITO Low Resistance Electrode for the Application to the High Speed Operation Fingerprint Sensor Array in the Touch Panel

As personal mobile devices have been improved and concept of IoT has been introduced into every objects as well as computers or tablet PCs, the importance of security for personal information has surfaced as a serious issue. For that reason, many related industries have been taking profound interests in fingerprint verification technology. One of the most attractive research should be manufacturing capacitive-typed fingerprint sensor array which is transparent and able to be embedded in the touch panel. The fingerprint sensor based on oxide thin film transistor (TFT) array is one of the solution for the high resolution and high speed operation. Furthermore, this transparent oxide TFT array has price competitiveness due to the simple structure and can be successfully adopted to the flexible IoT devices in comparison to the semiconductor technology based on the silicon. Since capacitive-typed high speed operation fingerprint sensor array consists of 500 ppi resolution pixels with one TFT and one capacitor, low resistance transparent electrode are essential to obtain high transparency. Well-known transparent electrode material, Indium-Tin-Oxide (ITO), has 10Ω/sq of sheet resistance at 150nm-thick that may not be enough to manufacture fingerprint sensor array embedded in the display panels. Representative low-resistance metal, Ag, has difficulty in use not only for electrode of oxide TFT but the sensing electrode due to its low transparency. Within the level that its transparency satisfies requirement, however, inserting Ag layer between both sides of ITO layers definitely helps resistance decreases. For the reduction of capacitance within the array, minimum width of electrode patterns used for the fingerprint sensor array is less than 5㎛ and dry etching process plays a vital role in patterning ITO/Ag/ITO triple layers. Although ITO and Ag can be etched in the same way by dry gas based on Cl, the difference on etch rates of the two materials possibly generates some problem like Ag exposure at the side of etched profile. It can surely cause a great change on the final properties of TFTs, and that is the reason why dry etching process should be a core technology in this case. As mentioned above, Cl 2 and Ar are mainly used as etching gas for both ITO and Ag in this study [1], but their etch rates are greatly different from each other. We found out that ITO had been etched five times faster than Ag, so that a protrusion of Ag edge had been inevitable from the ITO edge during the triple dry etching sequences although we had put only 10nm-thick Ag in the middle. To solve this problem, we used two methods mostly to modify dry etching recipe for removing by-product that might be formed by Ag exposure in air; one is using O 2 gas instead of Ar as a base gas during main etching, especially later in the process, the other is insertion of additional ashing step with O 2 gas after the main etching process. In this study, we fabricated top gate structured TFT applied with ITO/Ag/ITO triple stack as a source/drain in order to verify good characteristics of the triple layers as transparent electrode. As described above, we developed the dry etching conditions which didn’t have a bad effect on contact property, and also confirmed final characteristics of the top gate structured TFT. This top gate structured TFT included Indium-Gallium-Zinc-Oxide (IGZO) as an active layer and Al 2 O 3 as a gate insulator. TFT post annealed at 300℃ showed mobility, Von, S.S, and hysteresis of 15.6㎤/V.s, 0.3V, 0.1V/dec., and almost 0V, respectively, and moreover, study on stability and analysis depending on various dimensions of TFT channel will be proceeded. Furthermore, we are currently working on analysis of stacked films by TEM to investigate Ag film which may be degenerated during post annealed process or oxidized by exposure in air. Obtaining outstanding TFT properties with ITO/Ag/ITO triple stack as a source/drain layer means that we developed etched profile which does not influence TFT operation at all, and what is more, it can stand comparison with other transparent materials applied to fingerprint sensor embedded display panel. Besides, totally transparent high resolution transistor array will be fully valuable for new transparent display application such as augmented reality. [1] Y.J. Lee, S.D. Park, B.K. Song, S.-G Kim, H.-H, Choe, M.-P. Hong and G.-Y, Yeom, Jpn. J. Appl. Phys., Vol. 42 (2003) pp.286-290 This work was supported by Open Innovation Lab Project from National Nanofab Center (NNFC).

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