A mixed-signal feed-forward neural network architecture with on-chip learning in CMOS 0.18 microns.
Bibliographic record
Abstract
One of the main characteristics of the neural networks is their high number of interconnections between the neurons through synaptic multipliers. Interconnections occupy large area and increase the circuit complexity which limits the size of the fully parallel network. To implement large size networks, time-multiplexing should be used. Two new mixed-signal time-multiplexed architectures are proposed for on-chip mixed-signal neural networks. MRIII is used for training the network which is more robust to mixed-signal designs. The problem of node addressing and routing is solved by performing the operations in current mode. The architectures are simple and compact and learning is performed on-chip without the host computer, which reduces the cost of learning for the network. Mixed-signal MDACs are used for synaptic multiplication. A new compact architecture is proposed for the MDAC to reduce the area, power consumption and noise. The proposed MDAC performs the digital to analog conversion in series. Comparison shows that the new MDAC is more linear and has less noise than the conventional MDAC. The layout of the proposed MDAC is relatively easy, since it has a repetitive structure. For the first time, a new 12-bit MDAC is implemented, which enables us to perform on-chip training. The proposed 12-bit MDAC still occupies less area compared to the 7-bit conventional MDAC. A new low-voltage class-AB high-drive buffer for driving the voltages off-chip is developed. The proposed buffer is able to drive capacitive loads up to 2nF. It also drives resistive loads down to 2kO from rail to rail. For compensation, a 0.2pF capacitor is used.Dept. of Electrical and Computer Engineering. Paper copy at Leddy Library: Theses & Major Papers - Basement, West Bldg. / Call Number: Thesis2002 .M47. Source: Masters Abstracts International, Volume: 42-01, page: 0298. Adviser: M. Ahmadi. Thesis (M.A.Sc.)--University of Windsor (Canada), 2003.
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How this classification was reachedexpand
Full frame machine prediction
Teacher imitationNot calibrated prevalence, not ground truth. Human validation pending. The Gemma side is a direct model label for every work in the frame, read from the title-only record. The Codex side is a classifier learned from the 10,348 direct Codex labels and calibrated to design-weighted sample rates; fields without enough sample support carry no Codex call. Candidate is the union of the two sides; consensus is their intersection. These outputs are machine_predicted_unvalidated and are not human labels.
Distilled classifier scores by category (both heads)
| Category | Codex | Gemma |
|---|---|---|
| Metaresearch | 0.000 | 0.000 |
| Meta-epidemiology (narrow) | 0.000 | 0.000 |
| Meta-epidemiology (broad) | 0.000 | 0.000 |
| Bibliometrics | 0.000 | 0.000 |
| Science and technology studies | 0.000 | 0.000 |
| Scholarly communication | 0.000 | 0.001 |
| Open science | 0.001 | 0.000 |
| Research integrity | 0.000 | 0.000 |
| Insufficient payload (model declined to judge) | 0.003 | 0.001 |
Machine scores (provisional)
The two teacher heads of the student model, read on this work. A score orders the frame for review; it never asserts a category, and the validation status ships verbatim with every row.
Baseline scores from an immature model (maturity gate not passed, 7 training rounds). Scores rank; they never assert a category.
score_only:v0-immature-baseline · verbatim from the scoring run: score_only means the number may rank works, and no category label ships from itClassification
machine, unvalidatedMachine predicted; a candidate call from one source (direct Gemma or distilled Codex), not a consensus.
How this classification was reached, model by model and score by score, is at the end of the page under "How this classification was reached".