MétaCan
Menu
Back to cohort
Record W1788945862 · doi:10.24908/pceea.v0i0.4882

CUSTOM GRAPHICAL SIMULATORS FOR VHDL LOGIC DESCRIPTIONS AND THE ALTERA NIOS II PROCESSOR

2013· article· en· W1788945862 on OpenAlexafffundvenue
Naraig Manjikian, Valerie Sugarman

Bibliographic record

VenueProceedings of the Canadian Engineering Education Association (CEEA) · 2013
Typearticle
Languageen
FieldComputer Science
TopicVLSI and Analog Circuit Testing
Canadian institutionsUniversity of WaterlooQueen's University
FundersQueen's University
KeywordsVHDLComputer scienceComputer architectureLogic simulationRegister-transfer levelHardware description languageComputer hardwareRelation (database)Logic synthesisField-programmable gate arrayLogic gate

Abstract

fetched live from OpenAlex

This paper describes the rationale for devel- oping custom graphical simulators for courses in digital logic and computer architecture, discusses key features of these simulators in relation to the laboratory hardware for the two courses in question, and explores the learning benefits that can be obtained. The digital logic simulator models switch/pushbutton inputs and LED outputs, and it allows a custom circuit to be specified rapidly in a subset of the VHDL language using predefined signal names and flip-flop elements. The computer architecture simulator provides higher-level modeling of the execution behavior of a 32-bit processor with graphical depiction of register and memory contents. It simulates character input/output, and it models the switch, pushbutton, and LED features of laboratory hardware. When students in the two courses were surveyed about the custom simulators, a majority of them indicated a degree of enhancement to their learning.

Fetched live from OpenAlex and de-inverted. Abstracts are not stored in this database: the inverted indexes are 8.6 GB of the frame’s 9.3 GB of text, and the host has 13 GB free.

How this classification was reachedexpand

Full frame distilled prediction

Teacher imitation

Not calibrated prevalence, not ground truth. Human validation pending. Learned from the 10,348 direct Codex labels and 10,348 direct Gemma labels. Candidate is the union of thresholded teacher heads; consensus is their intersection. These outputs are machine_predicted_unvalidated and are not human labels or direct frontier model labels.

metaresearch head score (Codex)0.001
metaresearch head score (Gemma)0.002
Version: codex-gemma-dda1882f352aValidation status: machine_predicted_unvalidated
Candidate categoriesnone
Consensus categoriesnone
DomainCandidate signal: none · Consensus signal: none
Study designCandidate signal: Theoretical or conceptual · Consensus signal: none
GenreCandidate signal: Empirical · Consensus signal: Empirical
Teacher disagreement score0.815
Threshold uncertainty score0.405

Codex and Gemma teacher scores by category

CategoryCodexGemma
Metaresearch0.0010.002
Meta-epidemiology (narrow)0.0000.000
Meta-epidemiology (broad)0.0000.000
Bibliometrics0.0000.001
Science and technology studies0.0010.000
Scholarly communication0.0000.000
Open science0.0000.000
Research integrity0.0000.000
Insufficient payload (model declined to judge)0.0000.000

Machine scores (provisional)

The two teacher heads of the student model, read on this work. A score orders the frame for review; it never asserts a category, and the validation status ships verbatim with every row.

Baseline scores from an immature model (maturity gate not passed, 7 training rounds). Scores rank; they never assert a category.

Opus teacher head0.006
GPT teacher head0.192
Teacher spread0.185 · how far apart the two teachers sit on this one work
Validation statusscore_only:v0-immature-baseline · verbatim from the scoring run: score_only means the number may rank works, and no category label ships from it

Classification

machine, unvalidated

Machine predicted; a candidate call from one teacher head, not a consensus.

The models applied no category: nothing in the taxonomy fit this work.
Study designTheoretical or conceptual
Domainnot available
GenreEmpirical

How this classification was reached, model by model and score by score, is at the end of the page under "How this classification was reached".

Quick stats

Citations2
Published2013
Admission routes3
Has abstractyes

Explore more

Same venueProceedings of the Canadian Engineering Education Association (CEEA)Same topicVLSI and Analog Circuit TestingFrench-language works237,207