An FPGA-based real-time HIL test bench for full-bridge modular multilevel STATCOM controller
Bibliographic record
Abstract
The modular multilevel converter (MMC) STATCOM removes the need for AC filter and transformer, has no DC bus fault hazard, and thus becomes a better option than a 2-level voltage source converter (VSC) STATCOM. An MMC can have hundreds of submodules (SM). The switches in the SM are controlled individually and the capacitor voltages have to be balanced. Therefore, the control and protection system is sophisticated and has to be validated for different scenarios preferably by hardware-in-the-Loop (HIL) tests. Modeling MMC in detail and simulating it in real time has two main challenges: solving the large circuit containing numerous switches and handling numerous inputs and outputs (IO) in very small time steps. This paper presents a real time test bench, which implements the detailed MMC valve models in field programmable gate array (FPGA) boards and enables connecting to external controllers through high speed protocols used by MMC manufacturers. It can simulate very large systems, e.g. multiple MMC STATCOM and high voltage direct current (HVDC) systems with up to 1000 SM per valve, at multiple sampling rates in real time: the MMC valve is simulated in FPGA with a time step of 250 ns and the rest of the power system is simulated in central processing unit (CPU) cores with a time step of tens of microseconds. The detailed MMC model in the test bench is able to accurately reproduce system behaviors in steady state, transients and faults, which facilitate HIL tests of actual MMC controller for all scenarios in a close-to-reality environment.
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How this classification was reachedexpand
Full frame machine prediction
Teacher imitationNot calibrated prevalence, not ground truth. Human validation pending. The Gemma side is a direct model label for every work in the frame, read from the title-only record. The Codex side is a classifier learned from the 10,348 direct Codex labels and calibrated to design-weighted sample rates; fields without enough sample support carry no Codex call. Candidate is the union of the two sides; consensus is their intersection. These outputs are machine_predicted_unvalidated and are not human labels.
Distilled classifier scores by category (both heads)
| Category | Codex | Gemma |
|---|---|---|
| Metaresearch | 0.000 | 0.001 |
| Meta-epidemiology (narrow) | 0.001 | 0.000 |
| Meta-epidemiology (broad) | 0.000 | 0.000 |
| Bibliometrics | 0.001 | 0.000 |
| Science and technology studies | 0.000 | 0.000 |
| Scholarly communication | 0.000 | 0.000 |
| Open science | 0.001 | 0.000 |
| Research integrity | 0.001 | 0.001 |
| Insufficient payload (model declined to judge) | 0.011 | 0.001 |
Machine scores (provisional)
The two teacher heads of the student model, read on this work. A score orders the frame for review; it never asserts a category, and the validation status ships verbatim with every row.
Baseline scores from an immature model (maturity gate not passed, 7 training rounds). Scores rank; they never assert a category.
score_only:v0-immature-baseline · verbatim from the scoring run: score_only means the number may rank works, and no category label ships from itClassification
machine, unvalidatedMachine predicted; a candidate call from one source (direct Gemma or distilled Codex), not a consensus.
How this classification was reached, model by model and score by score, is at the end of the page under "How this classification was reached".