MétaCan
Menu
Back to cohort
Record W2015183617 · doi:10.1109/mwscas.2010.5548577

Power and area efficient 5T-SRAM with improved performance for low-power SoC in 65nm CMOS

2010· article· en· W2015183617 on OpenAlexaff
Hooman Jarollahi, Richard F. Hobson

Bibliographic record

Venuenot available
Typearticle
Languageen
FieldEngineering
TopicLow-power high-performance VLSI design
Canadian institutionsSimon Fraser University
Fundersnot available
KeywordsStatic random-access memoryStandby powerCMOSLow-power electronicsPower (physics)Leakage (economics)Computer scienceVoltageElectronic engineeringMemory cellReliability (semiconductor)CPU cacheLeakage powerReduction (mathematics)CacheEmbedded systemElectrical engineeringTransistorEngineeringPower consumptionParallel computing

Abstract

fetched live from OpenAlex

This paper addresses performance and reliability issues in a 5T SRAM cell, and introduces a low power, reliable and high performance design in 65nm technology, which can be used as cache memory in processors and in low-power portable devices. The proposed SRAM cell features ~13% area reduction compared to a typical 6T cell. In addition, it features a biasing ground line, VSSM, which is charged by channel leakage current from memory cells in standby, and is used to pre-charge a single bit-line and bias the negative supply voltage of each memory cell to suppress standby leakage power. A major standby power reduction is gained compared to conventional 5T and 6T designs and up to ~30% compared to previous low-power 6T designs. The proposed design has read and static noises margins, as well as write `0' and read performance that are comparable to typical 6T designs. Write `1' is slower by ~11-31% depending on design choices and can be improved with minor cost of area and power.

Fetched live from OpenAlex and de-inverted. Abstracts are not stored in this database: the inverted indexes are 8.6 GB of the frame’s 9.3 GB of text, and the host has 13 GB free.

How this classification was reachedexpand

Full frame distilled prediction

Teacher imitation

Not calibrated prevalence, not ground truth. Human validation pending. Learned from the 10,348 direct Codex labels and 10,348 direct Gemma labels. Candidate is the union of thresholded teacher heads; consensus is their intersection. These outputs are machine_predicted_unvalidated and are not human labels or direct frontier model labels.

metaresearch head score (Codex)0.000
metaresearch head score (Gemma)0.000
Version: codex-gemma-dda1882f352aValidation status: machine_predicted_unvalidated
Candidate categoriesMeta-epidemiology (narrow)
Consensus categoriesnone
DomainCandidate signal: none · Consensus signal: none
Study designCandidate signal: Simulation or modeling · Consensus signal: none
GenreCandidate signal: Empirical · Consensus signal: Empirical
Teacher disagreement score0.670
Threshold uncertainty score1.000

Codex and Gemma teacher scores by category

CategoryCodexGemma
Metaresearch0.0000.000
Meta-epidemiology (narrow)0.0000.000
Meta-epidemiology (broad)0.0000.000
Bibliometrics0.0000.000
Science and technology studies0.0000.000
Scholarly communication0.0000.000
Open science0.0000.000
Research integrity0.0000.000
Insufficient payload (model declined to judge)0.0000.000

Machine scores (provisional)

The two teacher heads of the student model, read on this work. A score orders the frame for review; it never asserts a category, and the validation status ships verbatim with every row.

Baseline scores from an immature model (maturity gate not passed, 7 training rounds). Scores rank; they never assert a category.

Opus teacher head0.003
GPT teacher head0.174
Teacher spread0.171 · how far apart the two teachers sit on this one work
Validation statusscore_only:v0-immature-baseline · verbatim from the scoring run: score_only means the number may rank works, and no category label ships from it

Classification

machine, unvalidated

Machine predicted; a candidate call from one teacher head, not a consensus.

Study designSimulation or modeling
Domainnot available
GenreEmpirical

How this classification was reached, model by model and score by score, is at the end of the page under "How this classification was reached".

Quick stats

Citations4
Published2010
Admission routes1
Has abstractyes

Explore more

Same topicLow-power high-performance VLSI designFrench-language works237,207