MétaCan
Menu
Back to cohort
Record W2060853277 · doi:10.1109/icasid.2009.5276893

Design and implementation of HDLC procedures based on FPGA

2009· article· en· W2060853277 on OpenAlexaff
Jun Wang, Wenhao Zhang, Yuxi Zhang, Wei Wu, Weiguang Chang

Bibliographic record

Venuenot available
Typearticle
Languageen
FieldEngineering
TopicEmbedded Systems and FPGA Design
Canadian institutionsMcGill University
Fundersnot available
KeywordsField-programmable gate arrayVHDLComputer scienceCyclic redundancy checkEmbedded systemRedundancy (engineering)Computer hardwareHardware description languageFrame (networking)Operating systemComputer network

Abstract

fetched live from OpenAlex

High-level data link control (HDLC) procedure is one of the most important protocols in digital communications. This paper analyzes the methods of HDLC procedure implementation commonly used nowadays, and points out their defects. We propose a new hardware implementation of HDLC procedure based on Field Programmable Gates Array (FPGA), and especially illustrate how to generate frame check sequence (FCS) of HDLC-cycle redundancy check (CRC) in FPGA. We verified the methods above by downloading the HDLC modules designed in VHDL (VHSIC hardware description language) into FPGA, which shows the feasibility of the methods. The programming of modules is simple, easy to modify, and superior in practical application.

Fetched live from OpenAlex and de-inverted. Abstracts are not stored in this database: the inverted indexes are 8.6 GB of the frame’s 9.3 GB of text, and the host has 13 GB free.

How this classification was reachedexpand

Full frame machine prediction

Teacher imitation

Not calibrated prevalence, not ground truth. Human validation pending. The Gemma side is a direct model label for every work in the frame, read from the title-only record. The Codex side is a classifier learned from the 10,348 direct Codex labels and calibrated to design-weighted sample rates; fields without enough sample support carry no Codex call. Candidate is the union of the two sides; consensus is their intersection. These outputs are machine_predicted_unvalidated and are not human labels.

metaresearch head score (Codex)0.000
metaresearch head score (Gemma)0.001
Version: metacan-v3-hybrid-931329e0061cValidation status: machine_predicted_unvalidated
Candidate categoriesnone
Consensus categoriesnone
DomainCandidate signal: none · Consensus signal: none
Study designCandidate signal: Bench or experimental · Consensus signal: none
GenreCandidate signal: Empirical · Consensus signal: none
Teacher disagreement score0.004
Threshold uncertainty score0.014

Distilled classifier scores by category (both heads)

CategoryCodexGemma
Metaresearch0.0000.001
Meta-epidemiology (narrow)0.0000.000
Meta-epidemiology (broad)0.0000.000
Bibliometrics0.0010.000
Science and technology studies0.0000.000
Scholarly communication0.0010.001
Open science0.0010.000
Research integrity0.0000.000
Insufficient payload (model declined to judge)0.0040.001

Machine scores (provisional)

The two teacher heads of the student model, read on this work. A score orders the frame for review; it never asserts a category, and the validation status ships verbatim with every row.

Baseline scores from an immature model (maturity gate not passed, 7 training rounds). Scores rank; they never assert a category.

Opus teacher head0.014
GPT teacher head0.254
Teacher spread0.240 · how far apart the two teachers sit on this one work
Validation statusscore_only:v0-immature-baseline · verbatim from the scoring run: score_only means the number may rank works, and no category label ships from it

Classification

machine, unvalidated

Machine predicted; a candidate call from one source (direct Gemma or distilled Codex), not a consensus.

The models applied no category: nothing in the taxonomy fit this work.
Study designBench or experimental
Domainnot available
GenreEmpirical

How this classification was reached, model by model and score by score, is at the end of the page under "How this classification was reached".

Quick stats

Citations5
Published2009
Admission routes1
Has abstractyes

Explore more

Same topicEmbedded Systems and FPGA DesignFrench-language works237,207