On-chip decoupling architecture with variable nMOS gate capacitance for security protection
Why this work is in the frame
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Bibliographic record
Abstract
This paper presents a new on-chip partial decoupling architecture with variable nMOS gate capacitance as a countermeasure against power analysis attacks. The preferred form of the countermeasure consists of a decoupling switch and primary gate capacitor along with a bank of secondary gate capacitors which are coupled and decoupled in a random fashion. This provides a means of decoupling a sensitive cryptographic module from the power supply with low overhead and low design complexity. The random use of the secondary decoupling gate capacitors serves to mix and hide indirectly leaked side channel information from previous charge/discharge cycles. An implementation of the proposed architecture protecting an AES Sbox module was implemented in 65 nm CMOS TSMC technology. Simulations were performed using Cadence. Initial results conducted using 2000 traces collected at the power supply pin of the design show that the proposed countermeasure protects against correlation power analysis attacks.
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Full frame distilled prediction
Teacher imitationNot calibrated prevalence, not ground truth. Human validation pending. Learned from the 10,348 direct Codex labels and 10,348 direct Gemma labels. Candidate is the union of thresholded teacher heads; consensus is their intersection. These outputs are machine_predicted_unvalidated and are not human labels or direct frontier model labels.
Codex and Gemma teacher scores by category
| Category | Codex | Gemma |
|---|---|---|
| Metaresearch | 0.000 | 0.000 |
| Meta-epidemiology (narrow) | 0.000 | 0.000 |
| Meta-epidemiology (broad) | 0.000 | 0.000 |
| Bibliometrics | 0.000 | 0.000 |
| Science and technology studies | 0.000 | 0.000 |
| Scholarly communication | 0.000 | 0.000 |
| Open science | 0.000 | 0.000 |
| Research integrity | 0.000 | 0.000 |
| Insufficient payload (model declined to judge) | 0.000 | 0.000 |
Machine scores (provisional)
The two teacher heads of the student model, read on this work. A score orders the frame for review; it never asserts a category, and the validation status ships verbatim with every row.
Baseline scores from an immature model (maturity gate not passed, 7 training rounds). Scores rank; they never assert a category.
score_only:v0-immature-baseline · verbatim from the scoring run: score_only means the number may rank works, and no category label ships from it