Automated trace signals selection using the RTL descriptions
Why this work is in the frame
A frame that forgets how it found something cannot be audited. These are the routes that admitted this work.
Bibliographic record
Abstract
Pre-silicon verification has been traditionally used for eliminating design bugs before tape-out. However, due to the increasing design complexity and the limited accuracy in circuit modelling, the number of the design errors that escape to silicon continues to grow. This is aggravated by the interactions between multiple clock and power domains in the modern system-on-a-chip devices. As a result, structured methods for post-silicon debugging, which aim to detect and localize the bug escapes in silicon, have gained increasing attention in recent years. However, the existing approaches to aid post-silicon debugging primarily rely on the analysis performed using gate-level circuit descriptions. Since design entry is commonly done at the register transfer-level (RTL), the RTL information can be leveraged for the design of the on-chip debug hardware. In particular, in this paper we investigate how to automatically decide which signals to trace in real-time using the RTL information.
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Full frame distilled prediction
Teacher imitationNot calibrated prevalence, not ground truth. Human validation pending. Learned from the 10,348 direct Codex labels and 10,348 direct Gemma labels. Candidate is the union of thresholded teacher heads; consensus is their intersection. These outputs are machine_predicted_unvalidated and are not human labels or direct frontier model labels.
Codex and Gemma teacher scores by category
| Category | Codex | Gemma |
|---|---|---|
| Metaresearch | 0.000 | 0.000 |
| Meta-epidemiology (narrow) | 0.000 | 0.000 |
| Meta-epidemiology (broad) | 0.000 | 0.000 |
| Bibliometrics | 0.000 | 0.000 |
| Science and technology studies | 0.000 | 0.000 |
| Scholarly communication | 0.000 | 0.000 |
| Open science | 0.000 | 0.000 |
| Research integrity | 0.000 | 0.000 |
| Insufficient payload (model declined to judge) | 0.000 | 0.000 |
Machine scores (provisional)
The two teacher heads of the student model, read on this work. A score orders the frame for review; it never asserts a category, and the validation status ships verbatim with every row.
Baseline scores from an immature model (maturity gate not passed, 7 training rounds). Scores rank; they never assert a category.
score_only:v0-immature-baseline · verbatim from the scoring run: score_only means the number may rank works, and no category label ships from it