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Record W2097793795 · doi:10.1109/ccece.2007.423

Optimization of HW/SW Co-Design: Relevance to Configurable Processor and FPGA Technology

2007· article· en· W2097793795 on OpenAlex

Why this work is in the frame

A frame that forgets how it found something cannot be audited. These are the routes that admitted this work.

affAt least one author lists a Canadian institution in the pinned OpenAlex snapshot.
fundA Canadian funder is recorded on the work.

Bibliographic record

Venuenot available
Typearticle
Languageen
FieldComputer Science
TopicDigital Filter Design and Implementation
Canadian institutionsCMC Microsystems (Canada)
FundersNatural Sciences and Engineering Research Council of CanadaCMC Microsystems
KeywordsSpeedupComputer scienceField-programmable gate arrayDiscrete cosine transformSIMDParallel computingSoftwareEmbedded systemApplication-specific instruction-set processorComputer hardwareInstruction setComputer architectureImage (mathematics)

Abstract

fetched live from OpenAlex

This paper presents a methodology for optimization of HW/SW co-design based on emerging configurable processor and FPGA technologies. This methodology is illustrated by the optimization of a discrete cosine transform (DCT) for image compression based on Tensilica's Xtensa LX core and Xilinx Virtex-II Pro device. The various optimization processes of a 2-D DCT transform, including adding different processor instruction sets onto the base processor to speedup software execution, are described. The results show a 26.76 times speed increase by adding a 4-way SIMD (single instruction multiple data) instruction with moderate hardware cost for a simple 2-D DCT implementation. The optimized 4-way SIMD processor is implemented on the FPGA board to verify the design, and shows a further significant speedup for on-board calculation compared to instruction-set simulation results. The HW vs. SW optimization strategy, speed and HW cost trade-offs, etc. are presented.

Fetched live from OpenAlex and de-inverted. Abstracts are not stored in this database: the inverted indexes are 8.6 GB of the frame’s 9.3 GB of text, and the host has 13 GB free.

Full frame distilled prediction

Teacher imitation

Not calibrated prevalence, not ground truth. Human validation pending. Learned from the 10,348 direct Codex labels and 10,348 direct Gemma labels. Candidate is the union of thresholded teacher heads; consensus is their intersection. These outputs are machine_predicted_unvalidated and are not human labels or direct frontier model labels.

metaresearch head score (Codex)0.000
metaresearch head score (Gemma)0.000
Version: codex-gemma-dda1882f352aValidation status: machine_predicted_unvalidated
Candidate categoriesnone
Consensus categoriesnone
DomainCandidate signal: none · Consensus signal: none
Study designCandidate signal: Bench or experimental · Consensus signal: none
GenreCandidate signal: Methods · Consensus signal: none
Teacher disagreement score0.802
Threshold uncertainty score0.263

Codex and Gemma teacher scores by category

CategoryCodexGemma
Metaresearch0.0000.000
Meta-epidemiology (narrow)0.0000.000
Meta-epidemiology (broad)0.0000.000
Bibliometrics0.0000.001
Science and technology studies0.0000.000
Scholarly communication0.0000.001
Open science0.0000.000
Research integrity0.0000.000
Insufficient payload (model declined to judge)0.0000.000

Machine scores (provisional)

The two teacher heads of the student model, read on this work. A score orders the frame for review; it never asserts a category, and the validation status ships verbatim with every row.

Baseline scores from an immature model (maturity gate not passed, 7 training rounds). Scores rank; they never assert a category.

Opus teacher head0.026
GPT teacher head0.296
Teacher spread0.270 · how far apart the two teachers sit on this one work
Validation statusscore_only:v0-immature-baseline · verbatim from the scoring run: score_only means the number may rank works, and no category label ships from it

Quick stats

Citations1
Published2007
Admission routes2
Has abstractyes

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