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Record W2106247612 · doi:10.1109/iscas.2005.1465387

Application Specific Instruction-Set Processor Generation for Video Processing Based on Loop Optimization

2005· article· en· W2106247612 on OpenAlex

Why this work is in the frame

A frame that forgets how it found something cannot be audited. These are the routes that admitted this work.

affAt least one author lists a Canadian institution in the pinned OpenAlex snapshot.

Bibliographic record

Venuenot available
Typearticle
Languageen
FieldComputer Science
TopicEmbedded Systems Design Techniques
Canadian institutionsPolytechnique Montréal
Fundersnot available
KeywordsComputer scienceInstruction setApplication-specific instruction-set processorSpeedupComputer architectureDesign space explorationEmbedded systemHardware accelerationCode generationProfiling (computer programming)Integrated circuit designComputer engineeringParallel computingField-programmable gate arrayProgramming languageOperating system

Abstract

fetched live from OpenAlex

Until recently, application specific instruction-set processor (ASIP) design was very costly and complex. Now, ASIP circuits are much easier to develop with technologies like Tensilica and Altera configurable processors that provide tools enabling effective generation of RTL (register transfer level) code for ASIPs. On the other hand, the design of effective ASIPs is still time-consuming, because existing methodologies largely rely on designers' knowledge for design space exploration. The paper describes a methodology to help design ASIPs. An iterative profiling-driven method based on detection and acceleration of application bottlenecks with specialized instructions is proposed. This method is applied to the design of an ASIP adapted for a video processing algorithm - the Wiener filter. The acceleration reached with our method on this application is very significant, with a speedup factor larger than 10 over optimized software code.

Fetched live from OpenAlex and de-inverted. Abstracts are not stored in this database: the inverted indexes are 8.6 GB of the frame’s 9.3 GB of text, and the host has 13 GB free.

Full frame distilled prediction

Teacher imitation

Not calibrated prevalence, not ground truth. Human validation pending. Learned from the 10,348 direct Codex labels and 10,348 direct Gemma labels. Candidate is the union of thresholded teacher heads; consensus is their intersection. These outputs are machine_predicted_unvalidated and are not human labels or direct frontier model labels.

metaresearch head score (Codex)0.000
metaresearch head score (Gemma)0.000
Version: codex-gemma-dda1882f352aValidation status: machine_predicted_unvalidated
Candidate categoriesnone
Consensus categoriesnone
DomainCandidate signal: none · Consensus signal: none
Study designCandidate signal: Simulation or modeling · Consensus signal: Simulation or modeling
GenreCandidate signal: Methods · Consensus signal: Methods
Teacher disagreement score0.397
Threshold uncertainty score0.586

Codex and Gemma teacher scores by category

CategoryCodexGemma
Metaresearch0.0000.000
Meta-epidemiology (narrow)0.0000.000
Meta-epidemiology (broad)0.0000.000
Bibliometrics0.0000.000
Science and technology studies0.0000.000
Scholarly communication0.0000.001
Open science0.0000.000
Research integrity0.0000.000
Insufficient payload (model declined to judge)0.0000.000

Machine scores (provisional)

The two teacher heads of the student model, read on this work. A score orders the frame for review; it never asserts a category, and the validation status ships verbatim with every row.

Baseline scores from an immature model (maturity gate not passed, 7 training rounds). Scores rank; they never assert a category.

Opus teacher head0.033
GPT teacher head0.276
Teacher spread0.243 · how far apart the two teachers sit on this one work
Validation statusscore_only:v0-immature-baseline · verbatim from the scoring run: score_only means the number may rank works, and no category label ships from it

Quick stats

Citations9
Published2005
Admission routes1
Has abstractyes

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