On the extension of SystemC by SystemVerilog assertions
Why this work is in the frame
A frame that forgets how it found something cannot be audited. These are the routes that admitted this work.
Bibliographic record
Abstract
In this paper, we present an extension to the SystemC library by SystemVerilog assertions. SystemC is an emerging system level design and verification language based on C++ object oriented paradigms. It enables the modelling and simulation of a complete system-on-a-chip. We propose to extend the SystemC library with assertion based verification (ABV) which is a higher abstraction mechanism that allows a concise capturing of design specification. In order to do so, we consider the same ABV structure as defined for the SystemVerilog language. We propose to add ABV as SystemC monitors on top of the original design. Doing so, an important goal is achieved, namely a unified language which brings together enhanced design and assertion features that deliver increased designer productivity and smarter verification. In the same time, considering SystemVerilog's standard assertions will take advantage from the result of an industry-wide effort to extend the Verilog language to include enhanced modelling and verification features.
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Full frame distilled prediction
Teacher imitationNot calibrated prevalence, not ground truth. Human validation pending. Learned from the 10,348 direct Codex labels and 10,348 direct Gemma labels. Candidate is the union of thresholded teacher heads; consensus is their intersection. These outputs are machine_predicted_unvalidated and are not human labels or direct frontier model labels.
Codex and Gemma teacher scores by category
| Category | Codex | Gemma |
|---|---|---|
| Metaresearch | 0.001 | 0.000 |
| Meta-epidemiology (narrow) | 0.000 | 0.000 |
| Meta-epidemiology (broad) | 0.000 | 0.000 |
| Bibliometrics | 0.000 | 0.000 |
| Science and technology studies | 0.000 | 0.000 |
| Scholarly communication | 0.000 | 0.000 |
| Open science | 0.001 | 0.000 |
| Research integrity | 0.000 | 0.000 |
| Insufficient payload (model declined to judge) | 0.000 | 0.000 |
Machine scores (provisional)
The two teacher heads of the student model, read on this work. A score orders the frame for review; it never asserts a category, and the validation status ships verbatim with every row.
Baseline scores from an immature model (maturity gate not passed, 7 training rounds). Scores rank; they never assert a category.
score_only:v0-immature-baseline · verbatim from the scoring run: score_only means the number may rank works, and no category label ships from it