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Record W2133454386 · doi:10.1109/cicc.1994.379729

Synthesizing optimal registerfile architectures for FPGA technology

2002· article· en· W2133454386 on OpenAlex

Why this work is in the frame

A frame that forgets how it found something cannot be audited. These are the routes that admitted this work.

affAt least one author lists a Canadian institution in the pinned OpenAlex snapshot.

Bibliographic record

Venuenot available
Typearticle
Languageen
FieldComputer Science
TopicEmbedded Systems Design Techniques
Canadian institutionsUniversity of Waterloo
Fundersnot available
KeywordsField-programmable gate arrayComputer scienceScheduling (production processes)InterconnectionComputer architectureEmbedded systemProgrammable Array LogicArchitectureMultiplexerSimple programmable logic deviceParallel computingLogic synthesisMultiplexingLogic gateEngineeringComputer networkAlgorithmTelecommunications

Abstract

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This paper presents for the first time an optimization approach to synthesis of application-specific registerfile architectures which are targeted for field programmable gate array (FPGA) technologies. A new integer programming (IP) model is presented that supports simultaneous scheduling, binding, and allocation, to minimize the number of registerfiles and the interconnect complexity (or the number of tristate drivers and multiplexor inputs). The TP model is used to map an application to a registerfile architecture suitable for prototyping or implementation in user-programmable FPGA technologies, such as Xilinx 4000. The same model supports early transferring of data on busses, and at most one registerfile is connected to each bus. Application-specific architectures with fewer busses, fewer registerfiles and up to 34% fewer bus connections than previous research have been synthesized. These IP synthesized architectures have also been successfully implemented in Xilinx 4000 FPGA technology to verify the approach. This research breaks new ground by (1) simultaneously scheduling, binding, and allocating registerfile architectures in practical cpu times, (2) synthesizing architectures which are suitable for prototyping or implementing in user-programmable FPGA technologies and (3) providing industry with a DA tool for synthesizing architectures with low interconnect complexity.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Fetched live from OpenAlex and de-inverted. Abstracts are not stored in this database: the inverted indexes are 8.6 GB of the frame’s 9.3 GB of text, and the host has 13 GB free.

Full frame distilled prediction

Teacher imitation

Not calibrated prevalence, not ground truth. Human validation pending. Learned from the 10,348 direct Codex labels and 10,348 direct Gemma labels. Candidate is the union of thresholded teacher heads; consensus is their intersection. These outputs are machine_predicted_unvalidated and are not human labels or direct frontier model labels.

metaresearch head score (Codex)0.000
metaresearch head score (Gemma)0.000
Version: codex-gemma-dda1882f352aValidation status: machine_predicted_unvalidated
Candidate categoriesnone
Consensus categoriesnone
DomainCandidate signal: none · Consensus signal: none
Study designCandidate signal: Bench or experimental · Consensus signal: none
GenreCandidate signal: Methods · Consensus signal: Methods
Teacher disagreement score0.609
Threshold uncertainty score0.532

Codex and Gemma teacher scores by category

CategoryCodexGemma
Metaresearch0.0000.000
Meta-epidemiology (narrow)0.0000.000
Meta-epidemiology (broad)0.0000.000
Bibliometrics0.0000.000
Science and technology studies0.0000.000
Scholarly communication0.0000.000
Open science0.0010.000
Research integrity0.0000.000
Insufficient payload (model declined to judge)0.0000.000

Machine scores (provisional)

The two teacher heads of the student model, read on this work. A score orders the frame for review; it never asserts a category, and the validation status ships verbatim with every row.

Baseline scores from an immature model (maturity gate not passed, 7 training rounds). Scores rank; they never assert a category.

Opus teacher head0.035
GPT teacher head0.257
Teacher spread0.222 · how far apart the two teachers sit on this one work
Validation statusscore_only:v0-immature-baseline · verbatim from the scoring run: score_only means the number may rank works, and no category label ships from it

Quick stats

Citations5
Published2002
Admission routes1
Has abstractyes

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