High Level Fixed Point VLSI Design with Automated Clock Gating
Bibliographic record
Abstract
Here we present a high level VLSI design platform, which supports the use of fixed point operations and automated clock gating of registers. This platform has been implemented by extending the CoDeL design suite. CoDeL allows hardware description at the algorithm level, and thus dramatically reduces design time. Also, it automatically inserts clock gating at the behavioral level to reduce dynamic power dissipation in the resulting architecture. This is, to our knowledge, the first hardware design environment that allows an algorithmic description of a component and yet produces a power aware design. We use the DSPstone benchmark to thoroughly evaluate this fixed point design platform for the design of power efficient DSP architectures. We find that, compared to a modern DSP, the CoDeL platform produces designs with somewhat slower run times but dramatically lower power dissipation. Next we use power analysis to compare the effectiveness of CoDeL's automated clock gating as compared to automated clock gating using synopsys tools. A simulation based power analysis shows that CoDeL's clock gating provides 16% more power savings than Synopsys' automated clock gating alone.
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How this classification was reachedexpand
Full frame distilled prediction
Teacher imitationNot calibrated prevalence, not ground truth. Human validation pending. Learned from the 10,348 direct Codex labels and 10,348 direct Gemma labels. Candidate is the union of thresholded teacher heads; consensus is their intersection. These outputs are machine_predicted_unvalidated and are not human labels or direct frontier model labels.
Codex and Gemma teacher scores by category
| Category | Codex | Gemma |
|---|---|---|
| Metaresearch | 0.001 | 0.000 |
| Meta-epidemiology (narrow) | 0.000 | 0.000 |
| Meta-epidemiology (broad) | 0.000 | 0.000 |
| Bibliometrics | 0.000 | 0.001 |
| Science and technology studies | 0.000 | 0.000 |
| Scholarly communication | 0.000 | 0.000 |
| Open science | 0.000 | 0.000 |
| Research integrity | 0.000 | 0.000 |
| Insufficient payload (model declined to judge) | 0.000 | 0.000 |
Machine scores (provisional)
The two teacher heads of the student model, read on this work. A score orders the frame for review; it never asserts a category, and the validation status ships verbatim with every row.
Baseline scores from an immature model (maturity gate not passed, 7 training rounds). Scores rank; they never assert a category.
score_only:v0-immature-baseline · verbatim from the scoring run: score_only means the number may rank works, and no category label ships from itClassification
machine, unvalidatedMachine predicted; a candidate call from one teacher head, not a consensus.
How this classification was reached, model by model and score by score, is at the end of the page under "How this classification was reached".