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Record W2611710136 · doi:10.1109/cpe.2017.7915231

Fault studies of MMC-HVDC links using FPGA and CPU on a real-time simulator with iteration capability

2017· article· en· W2611710136 on OpenAlex
Christian Dufour, Wei Li, Xiao Xiao, Jean‐Nicolas Paquin, Jean Bélanger

Why this work is in the frame

A frame that forgets how it found something cannot be audited. These are the routes that admitted this work.

affAt least one author lists a Canadian institution in the pinned OpenAlex snapshot.

Bibliographic record

Venuenot available
Typearticle
Languageen
FieldEngineering
TopicHVDC Systems and Fault Protection
Canadian institutionsOpal-Rt Technologies (Canada)
Fundersnot available
KeywordsField-programmable gate arrayComputer scienceFault (geology)SolverReal Time Digital SimulatorPower (physics)Embedded systemState (computer science)Electric power systemSimulationReal-time computing

Abstract

fetched live from OpenAlex

The detailed real-time simulation of MMC-based HVDC links is one of the most challenging tasks in power system validation today, requiring the combined use of CPU and FPGA technologies. The inclusion of surge arresters in the real-time fault tests further increases the difficulties because of the highly non-linear characteristics of such protective devices. In this paper, the OPAL-RT digital real-time simulator (DRTS) with the iteration capable State-Space-Nodal (SSN) solver is demonstrated to be accurate in such fault testing conditions. Two test cases are used for this purpose: an MMC-HVDC link based on the 401-level France-Spain link and a 271-level MMC system working in STATCOM mode.

Fetched live from OpenAlex and de-inverted. Abstracts are not stored in this database: the inverted indexes are 8.6 GB of the frame’s 9.3 GB of text, and the host has 13 GB free.

Full frame distilled prediction

Teacher imitation

Not calibrated prevalence, not ground truth. Human validation pending. Learned from the 10,348 direct Codex labels and 10,348 direct Gemma labels. Candidate is the union of thresholded teacher heads; consensus is their intersection. These outputs are machine_predicted_unvalidated and are not human labels or direct frontier model labels.

metaresearch head score (Codex)0.000
metaresearch head score (Gemma)0.000
Version: codex-gemma-dda1882f352aValidation status: machine_predicted_unvalidated
Candidate categoriesnone
Consensus categoriesnone
DomainCandidate signal: none · Consensus signal: none
Study designCandidate signal: Simulation or modeling · Consensus signal: none
GenreCandidate signal: Empirical · Consensus signal: Empirical
Teacher disagreement score0.501
Threshold uncertainty score0.315

Codex and Gemma teacher scores by category

CategoryCodexGemma
Metaresearch0.0000.000
Meta-epidemiology (narrow)0.0000.000
Meta-epidemiology (broad)0.0000.000
Bibliometrics0.0000.000
Science and technology studies0.0000.000
Scholarly communication0.0000.000
Open science0.0000.000
Research integrity0.0000.000
Insufficient payload (model declined to judge)0.0000.000

Machine scores (provisional)

The two teacher heads of the student model, read on this work. A score orders the frame for review; it never asserts a category, and the validation status ships verbatim with every row.

Baseline scores from an immature model (maturity gate not passed, 7 training rounds). Scores rank; they never assert a category.

Opus teacher head0.033
GPT teacher head0.294
Teacher spread0.261 · how far apart the two teachers sit on this one work
Validation statusscore_only:v0-immature-baseline · verbatim from the scoring run: score_only means the number may rank works, and no category label ships from it

Quick stats

Citations7
Published2017
Admission routes1
Has abstractyes

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