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Record W2752065998 · doi:10.1049/iet-cdt.2016.0200

High performance and energy efficient single‐precision and double‐precision merged floating‐point adder on FPGA

2017· article· en· W2752065998 on OpenAlex

Why this work is in the frame

A frame that forgets how it found something cannot be audited. These are the routes that admitted this work.

affAt least one author lists a Canadian institution in the pinned OpenAlex snapshot.
fundA Canadian funder is recorded on the work.

Bibliographic record

VenueIET Computers & Digital Techniques · 2017
Typearticle
Languageen
FieldComputer Science
TopicNumerical Methods and Algorithms
Canadian institutionsUniversity of Saskatchewan
FundersNatural Sciences and Engineering Research Council of CanadaUniversity of Saskatchewan
KeywordsAdderField-programmable gate arrayDouble-precision floating-point formatComputer scienceSingle-precision floating-point formatStratixComputer hardwareCarry-save adderThroughputEfficient energy useParallel computingFloating pointEmbedded systemAlgorithmEngineeringLatency (audio)Electrical engineering

Abstract

fetched live from OpenAlex

A high performance and energy efficient single‐precision and double‐precision merged floating‐point adder based on the two‐path FP addition algorithm designed and implemented on field programmable gate array (FPGA) is presented. With a fully pipelined architecture, the proposed adder can accomplish one double‐precision addition or two parallel single‐precision additions in six clock cycles. The proposed architecture is designed based on the double‐precision adder and each major component is segmented to support dual single‐precision operations. In addition, all the components of the proposed adder are optimised for mapping on FPGA. The proposed architecture is implemented on both Altera Stratix‐III and Xilinx Virtex‐5 devices and it has a faster clock frequency when compared with the double‐precision intellectual property (IP) core adder provided by the FPGA vendors. Since the dual single‐precision operations support, the proposed adder has higher throughput compared with the single‐precision IP core adder. In addition, the proposed adder has better energy efficiency compared with both single‐precision and double‐precision IP core adder. The implementation results of the proposed adder on the latest Altera Arria‐10 and Xilinx Virtex‐7 devices are provided. A direct implementation of the proposed architecture on STM‐90 nm technology ASIC platform is also performed.

Fetched live from OpenAlex and de-inverted. Abstracts are not stored in this database: the inverted indexes are 8.6 GB of the frame’s 9.3 GB of text, and the host has 13 GB free.

Full frame distilled prediction

Teacher imitation

Not calibrated prevalence, not ground truth. Human validation pending. Learned from the 10,348 direct Codex labels and 10,348 direct Gemma labels. Candidate is the union of thresholded teacher heads; consensus is their intersection. These outputs are machine_predicted_unvalidated and are not human labels or direct frontier model labels.

metaresearch head score (Codex)0.000
metaresearch head score (Gemma)0.000
Version: codex-gemma-dda1882f352aValidation status: machine_predicted_unvalidated
Candidate categoriesMeta-epidemiology (narrow), Scholarly communication
Consensus categoriesnone
DomainCandidate signal: none · Consensus signal: none
Study designCandidate signal: Other design · Consensus signal: none
GenreCandidate signal: Methods · Consensus signal: none
Teacher disagreement score0.993
Threshold uncertainty score1.000

Codex and Gemma teacher scores by category

CategoryCodexGemma
Metaresearch0.0000.000
Meta-epidemiology (narrow)0.0000.000
Meta-epidemiology (broad)0.0000.000
Bibliometrics0.0000.000
Science and technology studies0.0010.000
Scholarly communication0.0020.001
Open science0.0010.001
Research integrity0.0000.000
Insufficient payload (model declined to judge)0.0000.000

Machine scores (provisional)

The two teacher heads of the student model, read on this work. A score orders the frame for review; it never asserts a category, and the validation status ships verbatim with every row.

Baseline scores from an immature model (maturity gate not passed, 7 training rounds). Scores rank; they never assert a category.

Opus teacher head0.019
GPT teacher head0.264
Teacher spread0.245 · how far apart the two teachers sit on this one work
Validation statusscore_only:v0-immature-baseline · verbatim from the scoring run: score_only means the number may rank works, and no category label ships from it