Conception d'un réseau de plots configurables multifonctions analogiques et numériques combiné à un réseau de distribution de puissance intégrés à l'échelle de la tranche de silicium
Bibliographic record
Abstract
RESUME De nos jours, les systemes electroniques sont en constante croissance en taille et en complexite. Cette complexite combinee a la reduction du temps de mise en marche rendant le design de systemes electroniques un grand defi pour les designers. Une plateforme de prototypage a recemment ete introduite afin de s’attaquer toutes ces contraintes a la fois. Cette plateforme s’appuie sur l’implementation d’un circuit configurable a l’echelle d’une tranche de silicium complete de 200mm de diametre. Cette surface est recouverte d’une mer de plots conducteurs configurables appeles NanoPads. Ces NanoPads sont suffisamment petits pour supporter des billes d’un diametre de 250 μm et d’un espacement de 500 μm et sont regroupes en matrices de 4×4 pour former des Cellules, qui sont a leur tour assemblees en Reticules de 32×32. Ces Reticules sont ensuite photo-repetes sur toute la surface d’une tranche de silicium et sont interconnectes entre eux pour former le WaferIC. Cet arrangement particulier de plots conducteurs configurables permet a un usager de deposer sur la surface active du WaferIC les circuits integres constituant un systeme electronique, sans tenir en compte l’orientation spatiale de ces derniers, de creer un schema d’interconnexions, de distribution la puissance et de debuter le prototypage du systeme en question. Une version preliminaire a ete fabriquees et testees avec succes et permet d’alimenter des circuits -integres et de configurer le WaferIC pour les interconnecter. Cette these par articles presente une nouvelle version du WaferIC avec une nouvelle proposition de distribution de la puissance avec une approche de maitres-esclaves qui met en valeur l’utilisation de plusieurs rails d’alimentation afin d’ameliorer le rendement energetique. Il est egalement mis de l’avant un reseau tres dense de convertisseurs analogique-numerique (CAN) et numerique-analogique (CNA) de plus de 300k elements, tolerant aux defectuosites et aux defauts de fabrication. Ce reseau de CAN-CNA permet d’ameliorer le WaferIC avec la transmission de signaux analogiques, en plus des signaux numeriques. Ce manuscrit comporte trois articles : un publie chez « Science & Business Media Analog Integrated Circuits and Signal Processing », un publie chez « Transactions on Circuits and Systems I : Regular » et finalement un soumis chez « Transactions on Very Large Scale Integration ».----------ABSTRACT Nowadays, electronic systems are in constant growth, size and complexity; combined with time to market it makes a challenge for electronic system designers. A prototyping platform has been recently introduced and addresses all those constraints at once. This platform is based on an active 200 mm in diameter wafer-scale circuit, which is covered with a set of small configurable and conductive pads called NanoPads. These NanoPads are designed to be small enough to support any integrated-circuit μball of a 250 μm diameter and 500 μm of pitch. They are assembled in a 4×4 matrix, forming a Unit-Cell, which are grouped in a Reticle-Image of 32×32. These Reticle-Images are photo-repeated over the entire surface of a 200 mm in diameter wafer and are interconnected together using interreticle stitching. This active wafer-scale circuit is called a WaferIC. This particular topology and distribution of NanoPads allows an electronic system designer to manually deposit any integrated-circuit (IC) on the active alignment insensitive surface of the WaferIC, to build the netlist linking all the ICs, power-up the systems and start the prototyping of the system. In this manuscript-based thesis, we present an improved version of the WaferIC with a novel approach for the power distribution network with a master-slave topology, which makes the use of embedded dual-power-rail voltage regulators in order to improve the power efficiency and decrease thermal dissipation. We also propose a default-tolerant network of analog to digital (ADC) and digital to analog (DAC) converters of more than 300k. This ADC-DAC network allows the WaferIC to not only support digital ICs but also propagate analog signals from one NanoPad to another. This thesis includes 3 papers : one submission to Springer Science & Business Media Analog Integrated Circuits and Signal Processing, one submission to IEEE Transactions on Circuits and Systems I : Regular Papers and finally one submission to IEEE Transactions on Very Large-Scale Integration. These papers propose novel architectures of dualrail voltage regulators, configurable analog buffers and configurable voltage references, which can be used as a DAC. A novel approach for a power distribution network and the integration of all the presented architectures is also proposed with the fabrication of a testchip in CMOS 0.18 μm technology, which is a small-scale version of the WaferIC.
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How this classification was reachedexpand
Full frame distilled prediction
Teacher imitationNot calibrated prevalence, not ground truth. Human validation pending. Learned from the 10,348 direct Codex labels and 10,348 direct Gemma labels. Candidate is the union of thresholded teacher heads; consensus is their intersection. These outputs are machine_predicted_unvalidated and are not human labels or direct frontier model labels.
Codex and Gemma teacher scores by category
| Category | Codex | Gemma |
|---|---|---|
| Metaresearch | 0.003 | 0.001 |
| Meta-epidemiology (narrow) | 0.001 | 0.001 |
| Meta-epidemiology (broad) | 0.001 | 0.000 |
| Bibliometrics | 0.000 | 0.001 |
| Science and technology studies | 0.001 | 0.001 |
| Scholarly communication | 0.000 | 0.001 |
| Open science | 0.001 | 0.000 |
| Research integrity | 0.002 | 0.002 |
| Insufficient payload (model declined to judge) | 0.000 | 0.000 |
Machine scores (provisional)
The two teacher heads of the student model, read on this work. A score orders the frame for review; it never asserts a category, and the validation status ships verbatim with every row.
Baseline scores from an immature model (maturity gate not passed, 7 training rounds). Scores rank; they never assert a category.
score_only:v0-immature-baseline · verbatim from the scoring run: score_only means the number may rank works, and no category label ships from itClassification
machine, unvalidatedMachine predicted; a candidate call from one teacher head, not a consensus.
How this classification was reached, model by model and score by score, is at the end of the page under "How this classification was reached".