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A Novel Architecture for Memristor-Based Logic

2021· article· en· W3200424893 on OpenAlex

Why this work is in the frame

A frame that forgets how it found something cannot be audited. These are the routes that admitted this work.

affAt least one author lists a Canadian institution in the pinned OpenAlex snapshot.

Bibliographic record

Venuenot available
Typearticle
Languageen
FieldEngineering
TopicAdvanced Memory and Neural Computing
Canadian institutionsUniversity of Windsor
Fundersnot available
KeywordsXNOR gateNAND gateLogic gateNOR gateNAND logicAND-OR-InvertPass transistor logicMemristorComputer scienceNOR logicLogic synthesisSpiceAND gateDigital electronicsOR gateVoltageAlgorithmLogic familyElectronic engineeringElectronic circuitElectrical engineeringEngineering

Abstract

fetched live from OpenAlex

This paper, proposes a new memristor-based NAND/NOR logic gates using convert Voltage to Memristance (VTM) method. Universal logic gates with similar structure require two different input voltages in order to program the gate to NAND or NOR functions. The proposed structure consists of two input terminals memristors (M <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">in</inf> ), and one output memristor (M <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">out</inf> ). Gate inputs are voltages and the logic value of M <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">out</inf> is the output. Also, other logic gates such as NOT, AND/OR, XOR and XNOR can be implemented using this approach. All of the digital gates and proposed circuits are evaluated using SPICE model of bipolar memristive system with a given threshold. Simulation results show improvement in operation step of the logic gates, higher switching speed, and lower power consumption compared with previous works.

Fetched live from OpenAlex and de-inverted. Abstracts are not stored in this database: the inverted indexes are 8.6 GB of the frame’s 9.3 GB of text, and the host has 13 GB free.

Full frame distilled prediction

Teacher imitation

Not calibrated prevalence, not ground truth. Human validation pending. Learned from the 10,348 direct Codex labels and 10,348 direct Gemma labels. Candidate is the union of thresholded teacher heads; consensus is their intersection. These outputs are machine_predicted_unvalidated and are not human labels or direct frontier model labels.

metaresearch head score (Codex)0.000
metaresearch head score (Gemma)0.000
Version: codex-gemma-dda1882f352aValidation status: machine_predicted_unvalidated
Candidate categoriesnone
Consensus categoriesnone
DomainCandidate signal: none · Consensus signal: none
Study designCandidate signal: Bench or experimental · Consensus signal: Bench or experimental
GenreCandidate signal: Methods · Consensus signal: none
Teacher disagreement score0.784
Threshold uncertainty score0.246

Codex and Gemma teacher scores by category

CategoryCodexGemma
Metaresearch0.0000.000
Meta-epidemiology (narrow)0.0000.000
Meta-epidemiology (broad)0.0000.000
Bibliometrics0.0000.000
Science and technology studies0.0000.000
Scholarly communication0.0000.000
Open science0.0000.000
Research integrity0.0000.000
Insufficient payload (model declined to judge)0.0000.000

Machine scores (provisional)

The two teacher heads of the student model, read on this work. A score orders the frame for review; it never asserts a category, and the validation status ships verbatim with every row.

Baseline scores from an immature model (maturity gate not passed, 7 training rounds). Scores rank; they never assert a category.

Opus teacher head0.029
GPT teacher head0.249
Teacher spread0.220 · how far apart the two teachers sit on this one work
Validation statusscore_only:v0-immature-baseline · verbatim from the scoring run: score_only means the number may rank works, and no category label ships from it

Quick stats

Citations7
Published2021
Admission routes1
Has abstractyes

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