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Record W4289383899 · doi:10.48550/arxiv.1810.07059

On the Off-chip Memory Latency of Real-Time Systems: Is DDR DRAM Really\n the Best Option?

2018· preprint· en· W4289383899 on OpenAlex

Why this work is in the frame

A frame that forgets how it found something cannot be audited. These are the routes that admitted this work.

affAt least one author lists a Canadian institution in the pinned OpenAlex snapshot.

Bibliographic record

VenuearXiv (Cornell University) · 2018
Typepreprint
Languageen
FieldComputer Science
TopicReal-Time Systems Scheduling
Canadian institutionsUniversity of Guelph
Fundersnot available
KeywordsMemory controllerComputer scienceCAS latencyDramRegistered memoryLatency (audio)Embedded systemInterleaved memoryMemory refreshUniform memory accessConventional memorySemiconductor memoryMemory managementComputer hardwareExtended memoryComputer memory

Abstract

fetched live from OpenAlex

Predictable execution time upon accessing shared memories in multi-core\nreal-time systems is a stringent requirement. A plethora of existing works\nfocus on the analysis of Double Data Rate Dynamic Random Access Memories (DDR\nDRAMs), or redesigning its memory to provide predictable memory behavior. In\nthis paper, we show that DDR DRAMs by construction suffer inherent limitations\nassociated with achieving such predictability. These limitations lead to 1)\nhighly variable access latencies that fluctuate based on various factors such\nas access patterns and memory state from previous accesses, and 2) overly\npessimistic latency bounds. As a result, DDR DRAMs can be ill-suited for some\nreal-time systems that mandate a strict predictable performance with tight\ntiming constraints. Targeting these systems, we promote an alternative off-chip\nmemory solution that is based on the emerging Reduced Latency DRAM (RLDRAM)\nprotocol, and propose a predictable memory controller (RLDC) managing accesses\nto this memory. Comparing with the state-of-the-art predictable DDR\ncontrollers, the proposed solution provides up to 11x less timing variability\nand 6.4x reduction in the worst case memory latency.\n

Fetched live from OpenAlex and de-inverted. Abstracts are not stored in this database: the inverted indexes are 8.6 GB of the frame’s 9.3 GB of text, and the host has 13 GB free.

Full frame distilled prediction

Teacher imitation

Not calibrated prevalence, not ground truth. Human validation pending. Learned from the 10,348 direct Codex labels and 10,348 direct Gemma labels. Candidate is the union of thresholded teacher heads; consensus is their intersection. These outputs are machine_predicted_unvalidated and are not human labels or direct frontier model labels.

metaresearch head score (Codex)0.002
metaresearch head score (Gemma)0.000
Version: codex-gemma-dda1882f352aValidation status: machine_predicted_unvalidated
Candidate categoriesMeta-epidemiology (narrow), Open science, Insufficient payload (model declined to judge)
Consensus categoriesnone
DomainCandidate signal: none · Consensus signal: none
Study designCandidate signal: Simulation or modeling · Consensus signal: none
GenreCandidate signal: Empirical · Consensus signal: Empirical
Teacher disagreement score0.710
Threshold uncertainty score1.000

Codex and Gemma teacher scores by category

CategoryCodexGemma
Metaresearch0.0020.000
Meta-epidemiology (narrow)0.0010.000
Meta-epidemiology (broad)0.0010.000
Bibliometrics0.0000.001
Science and technology studies0.0000.000
Scholarly communication0.0000.000
Open science0.0050.002
Research integrity0.0000.001
Insufficient payload (model declined to judge)0.0000.001

Machine scores (provisional)

The two teacher heads of the student model, read on this work. A score orders the frame for review; it never asserts a category, and the validation status ships verbatim with every row.

Baseline scores from an immature model (maturity gate not passed, 7 training rounds). Scores rank; they never assert a category.

Opus teacher head0.055
GPT teacher head0.200
Teacher spread0.145 · how far apart the two teachers sit on this one work
Validation statusscore_only:v0-immature-baseline · verbatim from the scoring run: score_only means the number may rank works, and no category label ships from it