Resource-efficient Neural Network Architectures for Classifying Nerve Cuff Recordings on Implantable Devices

Abstract Background Closed-loop control of functional electrical stimulation involves using recorded nerve signals to make decisions regarding nerve stimulation in real-time. Surgically implanted devices that can implement this strategy have significant potential to restore natural movement after paralysis. Previous work demonstrated the use of convolutional neural networks (CNNs) to discriminate between activity from different neural pathways recorded by a high-density multi-contact nerve cuff electrode. Despite state-of-the-art performance, that approach required too much data storage, power and computation time for a practical implementation on surgically implanted hardware. Objective To reduce resource utilization for an implantable implementation, with a minimal performance loss for CNNs that can discriminate between neural pathways in multi-contact nerve cuff electrode recordings. Methods Neural network (NN) architectures were evaluated on a dataset of rat sciatic nerve recordings previously collected using 56-channel (7 x 8) spiral nerve cuff electrodes to capture spatiotemporal neural activity patterns. The NNs were trained to classify individual, natural compound action potentials (nCAPs) elicited by sensory stimuli. Three architecture types were explored: the previously reported ESCAPE-NET, a fully convolutional network, and a recurrent neural network. Variations of each architecture yielded NNs with a range in the number of weights and required floating-point operations (FLOPs). Each NN was evaluated based on F1-score and resource requirements. Results NNs were identified that, when compared to ESCAPE-NET, required 1,132-1,787x fewer weights, 389-995x less memory, and 6-11,073x fewer FLOPs, while maintaining macro F1-scores of 0.70-0.71 compared to a baseline of 0.75. Memory requirements range from 22.69 KB to 58.11 KB, falling within the range of on-chip memory sizes from several published deep learning accelerators fabricated in 65nm ASIC technology. Conclusion Reduced versions of ESCAPE-NET require significantly fewer resources without significant accuracy loss, thus can be more easily incorporated into a surgically implantable device that performs closed-loop real-time responsive neural stimulation.

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