Measuring the Minimum Power Requirement of FPGA Architectural Specifications
Bibliographic record
Abstract
Bypass capacitances bridge the gap between momentary surges of power demand caused by switching transistors and the ability of power supplies to respond to these surges. Even though bypass capacitances are not explicitly specified in FPGA architectural specifications, the gate capacitances of quiescent transistors in an FPGA architecture can act as symbiotic bypass capacitances. Since any additional dedicated bypass capacitances can increase the implementation area of an FPGA, it is important to measure the ability of the quiescent bypass capacitances in maintaining stable operating voltages while the FPGA is powered by voltage sources with limited power outputs. This work measures the ability of the quiescent bypass capacitances in maintaining stable supply voltages under limited power in the context of FPGA architectural investigations. We found that, for the 12-LUT logic cluster investigated in this work, to limit VDD value droop to 5% of the nominal VDD value, the power source must be able to produce 3 times of the average power consumed by the same logic cluster powered by an ideal voltage source. When the power output is further reduced, VDD value droop increases, resulting in significantly increased delay and reduced noise margin. In addition, the degree of parallel execution also has a significant effect on VDD value. In particular, at the nominal VDD value of 0.9 volts and the maximum power output of 28.1 uW, executing all 12 LUTs in parallel results in VDD value drooping to a minimum value of 0.370 volts while executing 1 LUT at a time results in VDD value drooping to a minimum of 0.690 volts, with both cases achieving similar computing time. These results suggest that FPGA architectural evaluations should take bypass capacitances and the power limit of voltage sources into consideration in order to design efficient FPGA architectures for low power applications.
Fetched live from OpenAlex and de-inverted. Abstracts are not stored in this database: the inverted indexes are 8.6 GB of the frame’s 9.3 GB of text, and the host has 13 GB free.
How this classification was reachedexpand
Full frame machine prediction
Teacher imitationNot calibrated prevalence, not ground truth. Human validation pending. The Gemma side is a direct model label for every work in the frame, read from the title-only record. The Codex side is a classifier learned from the 10,348 direct Codex labels and calibrated to design-weighted sample rates; fields without enough sample support carry no Codex call. Candidate is the union of the two sides; consensus is their intersection. These outputs are machine_predicted_unvalidated and are not human labels.
Distilled classifier scores by category (both heads)
| Category | Codex | Gemma |
|---|---|---|
| Metaresearch | 0.001 | 0.006 |
| Meta-epidemiology (narrow) | 0.001 | 0.000 |
| Meta-epidemiology (broad) | 0.000 | 0.000 |
| Bibliometrics | 0.001 | 0.001 |
| Science and technology studies | 0.000 | 0.000 |
| Scholarly communication | 0.001 | 0.001 |
| Open science | 0.001 | 0.000 |
| Research integrity | 0.000 | 0.000 |
| Insufficient payload (model declined to judge) | 0.003 | 0.001 |
Machine scores (provisional)
The two teacher heads of the student model, read on this work. A score orders the frame for review; it never asserts a category, and the validation status ships verbatim with every row.
Baseline scores from an immature model (maturity gate not passed, 7 training rounds). Scores rank; they never assert a category.
score_only:v0-immature-baseline · verbatim from the scoring run: score_only means the number may rank works, and no category label ships from itClassification
machine, unvalidatedMachine predicted; a candidate call from one source (direct Gemma or distilled Codex), not a consensus.
How this classification was reached, model by model and score by score, is at the end of the page under "How this classification was reached".