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Area-Efficient Realization of Three-Input Logic Functions Using Hybrid SET-MOS Transistors

2025· article· en· W4413179540 on OpenAlexaff
Chunhong Chen

Bibliographic record

Venuenot available
Typearticle
Languageen
FieldEngineering
TopicSemiconductor materials and devices
Canadian institutionsUniversity of Windsor
Fundersnot available
KeywordsRealization (probability)Computer scienceLogic gatePass transistor logicSet (abstract data type)TransistorElectronic engineeringLogic synthesisLogic familyElectrical engineeringEngineeringAlgorithmProgramming languageMathematicsVoltage

Abstract

fetched live from OpenAlex

Logic synthesis is a crucial step in the electronic design automation (EDA). While two-input logic gates can be easily implemented with MOS transistors, realization of multiple-input (or three-input, in particular) functions remains to be less area-efficient at transistor level. This paper presents an area-efficient realization for any three-input logic functions by using single-electron transistors (SETs) combined with MOS transistors. Results show that with their unique oscillation characteristics, SETs can provide significant improvement for logic synthesis in terms of transistor count over pure CMOS counterparts. This could potentially change traditional design paradigms in the EDA.

Fetched live from OpenAlex and de-inverted. Abstracts are not stored in this database: the inverted indexes are 8.6 GB of the frame’s 9.3 GB of text, and the host has 13 GB free.

How this classification was reachedexpand

Full frame distilled prediction

Teacher imitation

Not calibrated prevalence, not ground truth. Human validation pending. Learned from the 10,348 direct Codex labels and 10,348 direct Gemma labels. Candidate is the union of thresholded teacher heads; consensus is their intersection. These outputs are machine_predicted_unvalidated and are not human labels or direct frontier model labels.

metaresearch head score (Codex)0.000
metaresearch head score (Gemma)0.000
Version: codex-gemma-dda1882f352aValidation status: machine_predicted_unvalidated
Candidate categoriesnone
Consensus categoriesnone
DomainCandidate signal: none · Consensus signal: none
Study designCandidate signal: Simulation or modeling · Consensus signal: none
GenreCandidate signal: Empirical · Consensus signal: Empirical
Teacher disagreement score0.205
Threshold uncertainty score0.332

Codex and Gemma teacher scores by category

CategoryCodexGemma
Metaresearch0.0000.000
Meta-epidemiology (narrow)0.0000.000
Meta-epidemiology (broad)0.0000.000
Bibliometrics0.0000.000
Science and technology studies0.0000.000
Scholarly communication0.0000.000
Open science0.0000.000
Research integrity0.0000.000
Insufficient payload (model declined to judge)0.0000.000

Machine scores (provisional)

The two teacher heads of the student model, read on this work. A score orders the frame for review; it never asserts a category, and the validation status ships verbatim with every row.

Baseline scores from an immature model (maturity gate not passed, 7 training rounds). Scores rank; they never assert a category.

Opus teacher head0.036
GPT teacher head0.245
Teacher spread0.209 · how far apart the two teachers sit on this one work
Validation statusscore_only:v0-immature-baseline · verbatim from the scoring run: score_only means the number may rank works, and no category label ships from it

Classification

machine, unvalidated

Machine predicted; a candidate call from one teacher head, not a consensus.

The models applied no category: nothing in the taxonomy fit this work.
Study designSimulation or modeling
Domainnot available
GenreEmpirical

How this classification was reached, model by model and score by score, is at the end of the page under "How this classification was reached".

Quick stats

Citations1
Published2025
Admission routes1
Has abstractyes

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