サーバプラットフォームにおける並列プログラムの高電力効率実行
Bibliographic record
Abstract
As the technology size shrinks, the amount of hardware resources equipped on a single server platform has been increased, which has contributed a significant improvement in the performance of server platform for a decade.However, the power consumption also continues to be increased, and modern server platforms are becoming heavily power-constrained.Since multithreaded programs are commonly executed on server platforms, it is recently a big challenge to improve their power efficiency.In order to improve the performance of multithreaded programs under power constraints, this dissertation first proposes two techniques: dynamic core and frequency scaling (DCFS) and dynamic thread mapping with frequency scaling (DTMFS).DCFS dynamically and heuristically controls the number of active cores and CPU frequency according to the scalability to the number of active cores of a running program.It is a totally dynamic approach because it does not require offline training.On the other hand, DTMFS dynamically adjusts the mapping of threads to cores and CPU frequency as parameters on multi-socket NUMA platforms.It determines the best setting of these parameters at runtime using artificial neural network-based models.These proposed techniques are implemented as user-level runtime systems and evaluated on a 64-core 8-node real NUMA platform under power constraints.Compared to executions with all available cores on the minimum CPU frequency, DCFS achieves a 33.0%improvement in performance on average across twelve benchmarks.Moreover, DTMFS outperforms a naive counterpart, which leaves thread mapping to a Linux scheduler and dynamically controls only the frequency, by up to 67.1% for twelve benchmarks.In addition, this dissertation focuses on breadth-first search (BFS) that is an important algo-rithm for graph analysis applications.Since such applications are used in various real services, it is essential to improve the power efficiency of BFS.As a state-of-the-art multithreaded BFS implementation is memory-intensive, its memory access pattern is investigated using a multicore simulator.The results reveal that the conventional address mapping schemes of modern memory controllers do not efficiently utilize row buffers in DRAM and wastefully use too many banks.On the basis of the observations, this dissertation proposes a new address mapping scheme per-row channel interleaving.It can significantly improve row buffer locality while sustaining bank parallelism and reduce the number of banks used at a time without hurting bank parallelism of each thread.Consequently, it improves the DRAM power efficiency by 30.3% relative to a conventional scheme on the simulator.In summary, this dissertation demonstrates that there are four important parameters to improve the power efficiency of multithreaded programs running on server platforms: CPU frequency, the number of active cores, the mapping of threads to cores, and address mapping schemes.As power problems on server platforms are expected to be more severe in the future, it is essential to carefully tune these parameters in order to realize high-performance and low-power computation.List of Tables 3.1 Specification of a 64-core platform. . . . . . . . . .
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How this classification was reachedexpand
Full frame machine prediction
Teacher imitationNot calibrated prevalence, not ground truth. Human validation pending. The Gemma side is a direct model label for every work in the frame, read from the title-only record. The Codex side is a classifier learned from the 10,348 direct Codex labels and calibrated to design-weighted sample rates; fields without enough sample support carry no Codex call. Candidate is the union of the two sides; consensus is their intersection. These outputs are machine_predicted_unvalidated and are not human labels.
Distilled classifier scores by category (both heads)
| Category | Codex | Gemma |
|---|---|---|
| Metaresearch | 0.000 | 0.002 |
| Meta-epidemiology (narrow) | 0.001 | 0.000 |
| Meta-epidemiology (broad) | 0.000 | 0.000 |
| Bibliometrics | 0.001 | 0.001 |
| Science and technology studies | 0.001 | 0.000 |
| Scholarly communication | 0.001 | 0.001 |
| Open science | 0.001 | 0.001 |
| Research integrity | 0.000 | 0.001 |
| Insufficient payload (model declined to judge) | 0.004 | 0.002 |
Machine scores (provisional)
The two teacher heads of the student model, read on this work. A score orders the frame for review; it never asserts a category, and the validation status ships verbatim with every row.
Baseline scores from an immature model (maturity gate not passed, 7 training rounds). Scores rank; they never assert a category.
score_only:v0-immature-baseline · verbatim from the scoring run: score_only means the number may rank works, and no category label ships from itClassification
machine, unvalidatedMachine predicted; a candidate call from one source (direct Gemma or distilled Codex), not a consensus.
How this classification was reached, model by model and score by score, is at the end of the page under "How this classification was reached".