Process technology for High Speed InP Based Heterojunction Bipolar Transistors

By the advances in high frequency communication systems, and particularly Internet, wide bandwidth and high-speed transistors became key devices for the circuits. Especially, optical fibres can transport data at high rates. Therefore, high-speed electronics is necessary for all kind of data processing. One limitation is the ultra high frequency modulation of the light for data transport. This requires high frequency and high voltage of operation. Second, high linearity of amplification is necessary for analog-to-digital conversion (ADCs). Indium Phosphide based Heterojunction Bipolar Transistors (InP HBTs) have the potential to provide high speed and high voltage for optoelectronic communication ICs. Moreover, since their energy band gap corresponds to the 1.3 and 1.55 µm wavelength, which are the wavelengths providing minimum optical loss in fibres, InP HBTs are the best choices for optical communication circuits. In this work, a process technology is developed for HBTs capable of 80Gbit/s. The theory and also careful analysis have shown that the main limitations for the device speed are the base-collector capacitances and base resistances. Various designs are proposed to lower RC time constant. The influence of emitter size is observed on RF performance and for optical lithography it is found out that emitters with area of 1x15 µm2 provides the best RF performance. Another important aspect is to lower any additional parasitic effects. Therefore directly contacted emitters are proposed to eliminate parasitic components caused by dummy pads and to dissipate the heat overall the emitter efficiently. Since the contact spacing between base and emitter plays an important role for base resistance, emitter contacts are patterned perpendicular to the major flat for low underetching. In addition to this, emitter mesa wet chemical etching process is optimised and 170 nm of underetching is achieved, which is sufficient to realize 1 µm width emitters. A mask set is designed offering directly contacted emitters and reliable processes. To reduce the base resistance, Pt/Ti/Pt/Au contact metal system providing 4x10?7 Ohm.cm2 contact resistance, is used on the base layer. Moreover, current density is also an important aspect for the RF performance. The well-known Kirk Effect is analysed and the collector layer is doped to improve the maximum current density. 1x1017 cm-3 of collector doping density has doubled the maximum current density in comparison to the HBTs with non-intentionally doped collector layers. For HBTs with an emitter area of 1x15 µm2 on the optimised layer structure, presented maximum oscillation frequency (fmax) of 330 GHz and cut-off frequency (fT) of 170 GHz at 1.2 mA/µm2. 1 µm is the minimum width achievable by wet chemical etching. But on the other hand, for ultra high speed HBTs, submicron emitters are dispensable. Therefore, an ICP-RIE process with Cl2/N2 chemistry providing less emitter underetching is optimised. According to this, dry etching processes offering etch rate of 120 nm/min up to 1200 nm/min are optimised. For HBTs lower etch rate, vertical sidewall profile less damage to the surface are important aspects. An etch rate of 120 nm/min is sufficient for emitter mesa etching. Therefore, this process is investigated in details. It is found out that, RMS surface roughness less than 5 nm, ± 5 % uniformity over 2” wafer and ± 5 % run-to-run stability can be achieved at this low etch rates. Since the dry etching with this chemistry is not selective for InP and InGaAs, a hybrid etching process is sufficient to complete the emitter mesa etching. With this hybrid etching, the selectivity problem is solved with an emitter underetching of 85 nm. HBTs with an emitter area of 0.5x7.5 µm2 processed with hybrid etching, has shown a maximum oscillation frequency of 370 GHz and a cut-off frequency of 165 GHz. Not only the RF performance but also the uniformity of the HBT properties is also an important aspect for circuit applications. Hbyrid etching process offers better homogeneity in terms of etching in comparison to the solely wet chemical etching. The samples etched with wet chemical etching have shown dc current gain 41 with 4 % standard deviation where the solely etched ones have presented dc current gain of 64 with 7 % standard deviation. The yield for both type of processing is more than 90 %.With the optimised layout, layer structure and processing, InP HBTs with high speed, high yield and high uniformity are now ready for 80 Gbit/s communication circuits.

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