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Record W7116888168 · doi:10.1115/ipack2025-169115

Package-Level Evaluation System for Power Integrity Study

2025· article· W7116888168 on OpenAlexaff
Suresh Parameswaran, Thomas To, Nui Chong, Jonathan Chang, Saravanan Balakrishnan

Bibliographic record

Venuenot available
Typearticle
Language
FieldEngineering
TopicElectromagnetic Compatibility and Noise Suppression
Canadian institutionsAdvanced Micro Devices (Canada)
Fundersnot available
KeywordsPower integrityPower (physics)ChipSystem on a chipSoftware deploymentPower consumptionDynamic demand

Abstract

fetched live from OpenAlex

Abstract The constant evolution and scaling-up of applications like AI have been putting an ever-increasing demand for higher speed and performance on semiconductor chips. Consequently, power consumption by semiconductor chips has been on the rise in the recent past. FPGAs, GPUs and AI processors can easily consume thousands of watts of power. Proper power delivery is critical for the operation of these power-hungry chips. Inadequate power delivery can limit the functionality and performance of the chips, result in heating, lower lifetime of the chips and more. As a result, Power Integrity (PI) of chips and systems has emerged as a very important topic in industry. Considering the power delivery network (PDN) of chips and systems in detail is essential starting from the planning and architecture definition stages. The evaluation of PDN should continue through the development and deployment phases as well. Several CAD solutions exist for the modelling and simulation of power delivery into chips and systems. Simulations have to be complemented with actual silicon data-collection and analysis in order to produce optimal results. Not many hardware solutions are readily available for this purpose. This paper describes the architecture, implementation, details of operation, programming aspects and usage model of a customized silicon chip that will be used as a Power Integrity evaluation tool. The chip forms the heart of the PI evaluation system. The usage of the evaluation system in developing a Power Delivery Network model is covered. This chip has a simple implementation and is easy to program and use - yet has substantial PI evaluation capabilities. This evaluation system has a variety of applications including: • Power Delivery Network (PDN) study • Validation of PDN simulation models • On-chip and on-package decoupling capacitance evaluation • Micro-bump, C4-bump and BGA plan evaluation This highly configurable chip has the ability to do automated on-chip measurements through a test-friendly interface (simple, low pin-count & flexible) and has been tested on a simple and inexpensive test-platform. A large number of use-case scenarios were programmed, data was collected and analyzed from this evaluation system. Simulations were done using PDN models and correlated to above mentioned measurement data. It is concluded that this evaluation system is a valuable tool in the Power Integrity study of systems with semiconductor chip packages along with board (PCB).

Fetched live from OpenAlex and de-inverted. Abstracts are not stored in this database: the inverted indexes are 8.6 GB of the frame’s 9.3 GB of text, and the host has 13 GB free.

How this classification was reachedexpand

Full frame distilled prediction

Teacher imitation

Not calibrated prevalence, not ground truth. Human validation pending. Learned from the 10,348 direct Codex labels and 10,348 direct Gemma labels. Candidate is the union of thresholded teacher heads; consensus is their intersection. These outputs are machine_predicted_unvalidated and are not human labels or direct frontier model labels.

metaresearch head score (Codex)0.003
metaresearch head score (Gemma)0.000
Version: codex-gemma-dda1882f352aValidation status: machine_predicted_unvalidated
Candidate categoriesMeta-epidemiology (narrow), Insufficient payload (model declined to judge)
Consensus categoriesnone
DomainCandidate signal: none · Consensus signal: none
Study designCandidate signal: Simulation or modeling · Consensus signal: none
GenreCandidate signal: Empirical · Consensus signal: Empirical
Teacher disagreement score0.820
Threshold uncertainty score1.000

Codex and Gemma teacher scores by category

CategoryCodexGemma
Metaresearch0.0030.000
Meta-epidemiology (narrow)0.0000.000
Meta-epidemiology (broad)0.0010.000
Bibliometrics0.0000.000
Science and technology studies0.0000.000
Scholarly communication0.0000.000
Open science0.0000.000
Research integrity0.0000.000
Insufficient payload (model declined to judge)0.0010.000

Machine scores (provisional)

The two teacher heads of the student model, read on this work. A score orders the frame for review; it never asserts a category, and the validation status ships verbatim with every row.

Baseline scores from an immature model (maturity gate not passed, 7 training rounds). Scores rank; they never assert a category.

Opus teacher head0.043
GPT teacher head0.315
Teacher spread0.272 · how far apart the two teachers sit on this one work
Validation statusscore_only:v0-immature-baseline · verbatim from the scoring run: score_only means the number may rank works, and no category label ships from it

Classification

machine, unvalidated

Machine predicted; a candidate call from one teacher head, not a consensus.

Study designSimulation or modeling
Domainnot available
GenreEmpirical

How this classification was reached, model by model and score by score, is at the end of the page under "How this classification was reached".

Quick stats

Citations0
Published2025
Admission routes1
Has abstractyes

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