In Array Time-to-Digital Converter with 10 ps LSB and 43 μM × 35 μM Area in TSMC 65 nm

Many applications in nuclear science and medical imaging use scintillators to convert high-energy photons or particles into multiple photons that can be detected with silicon light detectors. For applications where the time of interaction matters, such as time-of-flight (ToF) positron emission tomography and ToF computed tomography, we need to timestamp the first photon detected. Unfortunately, single-photon detectors are subject to dark counts, which adds uncertainty to the measured timestamps. To better evaluate the time of interaction, we can use an estimator constructed on the first few timestamps. Thus, multiple time-to-digital converters (TDC) are required in the detector for the estimator to operate. Our team at the Universit'e de Sherbrooke is working on a 5 mm × 5 mm photon-to-digital converter (PDC). The detector is composed of 4096 single photon avalanche diodes (SPAD) 3D integrated with a TSMC 65 nm ASIC composed of an array of 4096 quenching circuits and 512 TDCs. As a stepping stone to the full-size PDC, we developed a test chip that includes 32 SPADs, 32 quenching circuits (QC), and 16 TDCs. The TDC is a 43 μm × 35 μm ring oscillator-based cascaded Vernier TDC with 2 stages. The TDC was characterised in multiple configurations: standalone, in group of 8, and in group of 16 running at the same time. Only a difference in the integral nonlinearity was observed at the target resolution of 10 ps. At this target resolution, we measured a precision of 4.1 ps rms, an average conversion time of 8.6 ns, and a power consumption of 28.6 μW at 1 Mcps. A test campaign will be done in Q3 2025 to evaluate the stability of the device and obtain a single photon timing resolution.

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