High-level FSMD design and automated clock gating with CoDeL
Why this work is in the frame
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Bibliographic record
Abstract
A high-level VLSI design platform, called CoDeL, which allows hardware description at the algorithm level and thus dramatically reduces design time, is presented. It now directly supports the use of fixed-point operations to ease description of digital signal processing (DSP) algorithms. Also, to dramatically reduce dynamic power dissipation in the resulting architecture, it automatically inserts clock gating for registers at the behavioural level. This is believed to be the first hardware design environment that allows an algorithmic description of a component and yet produces a power-aware design. The DSP stone benchmark is used to thoroughly evaluate this fixed-point design platform for the design of power-efficient DSP architectures. Power analysis is used to compare the effectiveness of CoDeL's automated clock gating to automated clock gating using Synopsys tools. The results show that a combination of CoDeL and Synopsys clock gating provides 16% more power savings, on average, than Synopsys' automated clock gating alone. Finally, the CoDeL platform is compared to a modern DSP processor, and it is found that the CoDeL platform produces designs with somewhat slower run times, but dramatically lower power dissipation.
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Full frame distilled prediction
Teacher imitationNot calibrated prevalence, not ground truth. Human validation pending. Learned from the 10,348 direct Codex labels and 10,348 direct Gemma labels. Candidate is the union of thresholded teacher heads; consensus is their intersection. These outputs are machine_predicted_unvalidated and are not human labels or direct frontier model labels.
Codex and Gemma teacher scores by category
| Category | Codex | Gemma |
|---|---|---|
| Metaresearch | 0.000 | 0.000 |
| Meta-epidemiology (narrow) | 0.000 | 0.000 |
| Meta-epidemiology (broad) | 0.000 | 0.000 |
| Bibliometrics | 0.000 | 0.000 |
| Science and technology studies | 0.000 | 0.000 |
| Scholarly communication | 0.000 | 0.000 |
| Open science | 0.000 | 0.000 |
| Research integrity | 0.000 | 0.000 |
| Insufficient payload (model declined to judge) | 0.000 | 0.000 |
Machine scores (provisional)
The two teacher heads of the student model, read on this work. A score orders the frame for review; it never asserts a category, and the validation status ships verbatim with every row.
Baseline scores from an immature model (maturity gate not passed, 7 training rounds). Scores rank; they never assert a category.
score_only:v0-immature-baseline · verbatim from the scoring run: score_only means the number may rank works, and no category label ships from it