System software utilization of hardware performance monitoring information
Bibliographic record
Abstract
Over the past several decades, microprocessors have evolved to assist system software in implementing new functionality or in improving the performance of programs. The relative abundance of available silicon may further motivate introducing new hardware features other than those that are directly required for executing code. The main focus of this dissertation is on how new hardware support can collect accurate performance data so as to enable system software in making more informed decisions in improving the performance of programs. First, we explore the problem of using Hardware Performance Counters (HPCs) to identify CPU bottlenecks accurately and efficiently. We address the problem of having a limited number of available HPCs by developing fine-grained HPC multiplexing that provides a large set of logical HPCs. We develop a simple and useful performance model, called stall breakdown to identify stressed processor components by focusing on cycles where the instruction completion stops. We generate the stall breakdown model by using HPC multiplexing online with negligible overhead. Secondly, we explore different methods of fine-grained data sampling at the hardware level. Using the continuous data sampling features of the IBM POWER5 processor, we identify a new technique to produce data samples based on their source, and in a case study, we demonstrate how to use source-based data samples to accurately characterize data sharing patterns among concurrent threads to effectively support sharing-aware schedulers. Finally, we propose novel hardware to track memory accesses at the granularity of virtual pages. Our proposed hardware is simple, efficient, and generic. We show how the proposed page access tracking hardware (PATH) can be used to improve performance in three different areas of memory management. In all three cases, we show that significant performance improvement can be achieved with negligible software overhead.
Fetched live from OpenAlex and de-inverted. Abstracts are not stored in this database: the inverted indexes are 8.6 GB of the frame’s 9.3 GB of text, and the host has 13 GB free.
How this classification was reachedexpand
Full frame machine prediction
Teacher imitationNot calibrated prevalence, not ground truth. Human validation pending. The Gemma side is a direct model label for every work in the frame, read from the title-only record. The Codex side is a classifier learned from the 10,348 direct Codex labels and calibrated to design-weighted sample rates; fields without enough sample support carry no Codex call. Candidate is the union of the two sides; consensus is their intersection. These outputs are machine_predicted_unvalidated and are not human labels.
Distilled classifier scores by category (both heads)
| Category | Codex | Gemma |
|---|---|---|
| Metaresearch | 0.001 | 0.008 |
| Meta-epidemiology (narrow) | 0.001 | 0.000 |
| Meta-epidemiology (broad) | 0.000 | 0.000 |
| Bibliometrics | 0.002 | 0.002 |
| Science and technology studies | 0.000 | 0.000 |
| Scholarly communication | 0.001 | 0.001 |
| Open science | 0.001 | 0.000 |
| Research integrity | 0.000 | 0.001 |
| Insufficient payload (model declined to judge) | 0.002 | 0.001 |
Machine scores (provisional)
The two teacher heads of the student model, read on this work. A score orders the frame for review; it never asserts a category, and the validation status ships verbatim with every row.
Baseline scores from an immature model (maturity gate not passed, 7 training rounds). Scores rank; they never assert a category.
score_only:v0-immature-baseline · verbatim from the scoring run: score_only means the number may rank works, and no category label ships from itClassification
machine, unvalidatedMachine predicted; a candidate call from one source (direct Gemma or distilled Codex), not a consensus.
How this classification was reached, model by model and score by score, is at the end of the page under "How this classification was reached".