MétaCan
Menu
Back to cohort
Record W2945239841 · doi:10.1145/3299874.3317993

Functionally Complete Boolean Logic and Adder Design Based on 2T2R RRAMs for Post-CMOS In-Memory Computing

2019· article· en· W2945239841 on OpenAlexaff
Zongxian Yang, Yixiao Ma, Lan Wei

Bibliographic record

Venuenot available
Typearticle
Languageen
FieldEngineering
TopicAdvanced Memory and Neural Computing
Canadian institutionsUniversity of Waterloo
Fundersnot available
KeywordsComputer scienceResistive random-access memoryLogic familyPass transistor logicLogic blockLogic gateIn-Memory ProcessingLogic synthesisCMOSAdderLogic optimizationBottleneckNAND gateVon Neumann architectureComputer architectureNon-volatile memoryParallel computingElectronic engineeringComputer hardwareElectronic circuitEmbedded systemDigital electronicsElectrical engineeringAlgorithmVoltageField-programmable gate arrayEngineering

Abstract

fetched live from OpenAlex

In-memory computing (IMC) paradigm has attracted extensive attention for future electronics to overcome the bottleneck and memory wall problem in the von Neumann systems. Nonvolatile logic based on resistive random-access memory (RRAM) is a promising route to implement such architecture. This paper presents the circuits and computing methodology to implement functionally complete Boolean logic and arithmetic block co-design using the CMOS-compatible 2-transistor-2-RRAM (2T2R) structure with reversely connected bipolar RRAM pairs. Arbitrary logic functions for two and multiple operands could be implemented in one-step operation, after which the computation results are in situ stored as the nonvolatile resistive states of the RRAM. In this design, the logic functionality is achieved by simply applying external operational voltages and/or corresponding RRAM initial states to the proposed 2T2R units. Compared with the traditional CMOS designs where the circuit topologies change with logic functions, the proposed 2T2R chain has a universal design with repeated unit blocks, independent of the logic functions. The highly regular and symmetric circuit structure makes it easy for design, integration, and fabrication. The proposed computing scheme/structure is intrinsic, clean, and efficient for IMC applications and presents superior performance in speed and area. The result of the study could build a technology cell library that can be potentially used as input to a technology-mapping algorithm for processing in-memory applications.

Fetched live from OpenAlex and de-inverted. Abstracts are not stored in this database: the inverted indexes are 8.6 GB of the frame’s 9.3 GB of text, and the host has 13 GB free.

How this classification was reachedexpand

Full frame distilled prediction

Teacher imitation

Not calibrated prevalence, not ground truth. Human validation pending. Learned from the 10,348 direct Codex labels and 10,348 direct Gemma labels. Candidate is the union of thresholded teacher heads; consensus is their intersection. These outputs are machine_predicted_unvalidated and are not human labels or direct frontier model labels.

metaresearch head score (Codex)0.000
metaresearch head score (Gemma)0.000
Version: codex-gemma-dda1882f352aValidation status: machine_predicted_unvalidated
Candidate categoriesnone
Consensus categoriesnone
DomainCandidate signal: none · Consensus signal: none
Study designCandidate signal: Simulation or modeling · Consensus signal: Simulation or modeling
GenreCandidate signal: Empirical · Consensus signal: none
Teacher disagreement score0.592
Threshold uncertainty score0.659

Codex and Gemma teacher scores by category

CategoryCodexGemma
Metaresearch0.0000.000
Meta-epidemiology (narrow)0.0000.000
Meta-epidemiology (broad)0.0000.000
Bibliometrics0.0000.000
Science and technology studies0.0000.000
Scholarly communication0.0000.000
Open science0.0000.000
Research integrity0.0000.000
Insufficient payload (model declined to judge)0.0000.000

Machine scores (provisional)

The two teacher heads of the student model, read on this work. A score orders the frame for review; it never asserts a category, and the validation status ships verbatim with every row.

Baseline scores from an immature model (maturity gate not passed, 7 training rounds). Scores rank; they never assert a category.

Opus teacher head0.031
GPT teacher head0.230
Teacher spread0.199 · how far apart the two teachers sit on this one work
Validation statusscore_only:v0-immature-baseline · verbatim from the scoring run: score_only means the number may rank works, and no category label ships from it

Classification

machine, unvalidated

Machine predicted; a candidate call from one teacher head, not a consensus.

The models applied no category: nothing in the taxonomy fit this work.
Study designSimulation or modeling
Domainnot available
GenreEmpirical

How this classification was reached, model by model and score by score, is at the end of the page under "How this classification was reached".

Quick stats

Citations0
Published2019
Admission routes1
Has abstractyes

Explore more

Same topicAdvanced Memory and Neural ComputingFrench-language works237,207