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Record W2991030845 · doi:10.1145/3339985.3358497

Verilog Loop Unrolling, Module Generation, Part-Select and Arithmetic Right Shift Support in Odin II

2019· article· en· W2991030845 on OpenAlexaff
Scott Young, Alexandrea Demmings, Nasrin Eshraghi Ivari, Jean-Philippe Legault, Kenneth B. Kent

Bibliographic record

Venuenot available
Typearticle
Languageen
FieldEngineering
TopicVLSI and FPGA Design Techniques
Canadian institutionsUniversity of New Brunswick
Fundersnot available
KeywordsNetlistVerilogComputer scienceField-programmable gate arrayHardware description languageComputer architectureRouting (electronic design automation)Computer hardwareEmbedded system

Abstract

fetched live from OpenAlex

Verilog is a hardware description language (HDL) that supports the specification of hardware circuitry and control logic for production, simulation and testing. The subset of the specification used for production is called synthesizable. Verilog-to-Routing (VTR) is a Computer-Aided Design (CAD) flow. It transforms synthesizable Verilog into a placed and routed configuration for a Field Programmable Gate Array (FPGA) architecture specified in XML. The front end of the VTR CAD flow is Odin II. Odin II parses Verilog files and uses them to create a netlist consisting of inputs, outputs, nodes, and connections. Odin II is an open-source research project, and full Verilog language coverage is a work in progress. This work extends Odin II's Verilog support to files containing the arithmetic right shift operator (>>>) and both the + : and - : part-select operators. It also adds support for simple for loops, while loops and loop-based module generation. Dynamic looping constructs are not synthesizable, so all looping constructs are processed before the netlist is generated. This paper will present the missing language features that were implemented, the scope of their implementation, the architecture of the solution, testing and finally the efficiency of the contributions.

Fetched live from OpenAlex and de-inverted. Abstracts are not stored in this database: the inverted indexes are 8.6 GB of the frame’s 9.3 GB of text, and the host has 13 GB free.

How this classification was reachedexpand

Full frame machine prediction

Teacher imitation

Not calibrated prevalence, not ground truth. Human validation pending. The Gemma side is a direct model label for every work in the frame, read from the title-only record. The Codex side is a classifier learned from the 10,348 direct Codex labels and calibrated to design-weighted sample rates; fields without enough sample support carry no Codex call. Candidate is the union of the two sides; consensus is their intersection. These outputs are machine_predicted_unvalidated and are not human labels.

metaresearch head score (Codex)0.001
metaresearch head score (Gemma)0.002
Version: metacan-v3-hybrid-931329e0061cValidation status: machine_predicted_unvalidated
Candidate categoriesnone
Consensus categoriesnone
DomainCandidate signal: none · Consensus signal: none
Study designCandidate signal: Not applicable · Consensus signal: none
GenreCandidate signal: Methods · Consensus signal: Methods
Teacher disagreement score0.013
Threshold uncertainty score0.043

Distilled classifier scores by category (both heads)

CategoryCodexGemma
Metaresearch0.0010.002
Meta-epidemiology (narrow)0.0010.000
Meta-epidemiology (broad)0.0000.000
Bibliometrics0.0010.000
Science and technology studies0.0000.001
Scholarly communication0.0020.001
Open science0.0010.001
Research integrity0.0000.001
Insufficient payload (model declined to judge)0.0130.004

Machine scores (provisional)

The two teacher heads of the student model, read on this work. A score orders the frame for review; it never asserts a category, and the validation status ships verbatim with every row.

Baseline scores from an immature model (maturity gate not passed, 7 training rounds). Scores rank; they never assert a category.

Opus teacher head0.009
GPT teacher head0.198
Teacher spread0.189 · how far apart the two teachers sit on this one work
Validation statusscore_only:v0-immature-baseline · verbatim from the scoring run: score_only means the number may rank works, and no category label ships from it

Classification

machine, unvalidated

Machine predicted; a candidate call from one source (direct Gemma or distilled Codex), not a consensus.

The models applied no category: nothing in the taxonomy fit this work.
Study designNot applicable
Domainnot available
GenreMethods

How this classification was reached, model by model and score by score, is at the end of the page under "How this classification was reached".

Quick stats

Citations1
Published2019
Admission routes1
Has abstractyes

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