An FPGA-based emulation process for dynamic quantum circuit
Bibliographic record
Abstract
The current quantum computation on real, physical devices has predominantly been constrained to basic, time-ordered sequences of unitary quantum operations culminating in a final projective measurement.As quantum computing hardware evolves in scale and functionality, it becomes crucial to facilitate the construction of quantum circuits beyond their traditional confines.Recent progress in quantum hardware has brought about mid-circuit measurements and resets, allowing for the recycling of measured qubits and notably decreasing the qubit demands for running quantum algorithms.In this thesis, we propose an FPGA-based dynamic quantum circuit emulation process that integrates quantum bit storage, quantum validation checking, quantum operation processing, quantum state measurement and probabilistic execution prediction to provide an emulation platform for designing and verifying dynamic quantum circuits.Each functional block in the proposed emulation process was analyzed and evaluated using the Vivado environment and programmed onto the Digilent Cmod A7-35T FPGA board.The quantum validation checking process blocked all the invalid qubits and achieved Abstract ii a 99.98% pass rate for valid qubits with the suitable threshold set.The ring-oscillator-based true random number generator used for the quantum state measurement process provides a 99.986% of 0-1 ratio.The testing results of the probabilistic execution predictor show that the average miss rate is as low as 25%, while the time saved by the process depends on the specific emulated quantum circuits.A case study is provided to present the comprehensive workflow of the emulation.iii Abrégé Le calcul quantique actuel sur des dispositifs physiques réels a été principalement limité à des séquences de base ordonnées dans le temps d'opérations quantiques unitaires aboutissant à une mesure projective finale.À mesure que le matériel informatique quantique évolue en termes d'échelle et de fonctionnalités, il devient crucial de faciliter la construction de circuits quantiques au-delà de leurs limites traditionnelles.Les progrès récents dans le domaine du matériel quantique ont permis des mesures et des réinitialisations à mi-circuit, permettant le recyclage des qubits mesurés et réduisant considérablement les demandes de qubits pour l'exécution d'algorithmes quantiques.Dans cette thèse, nous avons proposé un processus d'émulation de circuits quantiques dynamiques basé sur FPGA qui intègre le stockage de bits quantiques, la vérification de validation quantique, le traitement des opérations quantiques, la mesure d'état quantique et la prédiction d'exécution probabiliste pour fournir une plate-forme d'émulation pour la conception et la vérification de circuits quantiques dynamiques.Chaque bloc fonctionnel du processus d'émulation proposé a été analysé et évalué à Abrégé iv l'aide de l'environnement Vivado et programmé sur la carte FPGA Digilent Cmod A7-35T.Le processus de vérification de validation quantique a bloqué tous les qubits invalides et a atteint un taux de réussite de 99,98% pour les qubits valides avec le seuil approprié défini.Le générateur de nombres aléatoires réels basé sur un oscillateur en anneau utilisé pour le processus de mesure de l'état quantique fournit un rapport 0-1 de 99,986%.Les résultats des tests du prédicteur d'exécution probabiliste montrent que le taux d'échec moyen est aussi faible que 25%, tandis que le temps gagné par le processus dépend des circuits quantiques émulés spécifiques.Une étude de cas est fournie pour présenter le flux de travail complet de l'émulation.
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How this classification was reachedexpand
Full frame machine prediction
Teacher imitationNot calibrated prevalence, not ground truth. Human validation pending. The Gemma side is a direct model label for every work in the frame, read from the title-only record. The Codex side is a classifier learned from the 10,348 direct Codex labels and calibrated to design-weighted sample rates; fields without enough sample support carry no Codex call. Candidate is the union of the two sides; consensus is their intersection. These outputs are machine_predicted_unvalidated and are not human labels.
Distilled classifier scores by category (both heads)
| Category | Codex | Gemma |
|---|---|---|
| Metaresearch | 0.000 | 0.001 |
| Meta-epidemiology (narrow) | 0.000 | 0.000 |
| Meta-epidemiology (broad) | 0.000 | 0.000 |
| Bibliometrics | 0.000 | 0.000 |
| Science and technology studies | 0.000 | 0.000 |
| Scholarly communication | 0.000 | 0.000 |
| Open science | 0.001 | 0.000 |
| Research integrity | 0.000 | 0.000 |
| Insufficient payload (model declined to judge) | 0.005 | 0.001 |
Machine scores (provisional)
The two teacher heads of the student model, read on this work. A score orders the frame for review; it never asserts a category, and the validation status ships verbatim with every row.
Baseline scores from an immature model (maturity gate not passed, 7 training rounds). Scores rank; they never assert a category.
score_only:v0-immature-baseline · verbatim from the scoring run: score_only means the number may rank works, and no category label ships from itClassification
machine, unvalidatedMachine predicted; a candidate call from one source (direct Gemma or distilled Codex), not a consensus.
How this classification was reached, model by model and score by score, is at the end of the page under "How this classification was reached".