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4,299,418 works, Canadian by any of four routes.

Every filter state is a URL; the URL is the query; the query is citable via /q/⟨hash⟩. The page, the API and the export parse the same parameters.

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The current cohort, streamed from the database: every work column, the machine labels, the provisional scores, and the per-row validation status. Exports are capped at 100,000 rows. Mints a permanent /q/ link for this exact query. The same filters always produce the same link, whoever asks.

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IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Direct Codex and Gemma labels are unvalidated and sparse. Distilled predictions cover the full frame and are also unvalidated. Choose the evidence source explicitly; absence of a direct label is never a negative label.

affaffiliation
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The four routes compose: require the funder route and exclude affiliation to get the funder-only stratum no affiliation-based frame ever sees.

232 results · 1 filter active ·
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20002025
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Machine labels · sparse coverage
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An unlabeled work is unknown, not a negative. Label coverage is reported on every query.
232 works in the cohort · of 4,299,418page 3 of 5

Labels cover 0 of 232 works in this cohort. The rest are unlabeled, which is not a negative label: the label table is sparse today and grows as labeling rounds land.

Distilled predictions cover 232 of 232 works in this cohort. Predictions are machine_predicted_unvalidated teacher distillation outputs. Candidate is the union; consensus is the intersection.

affunlabeled
Optimizing Floating Point Units in Hybrid FPGAs
ChiWai Yu, Alastair Smith, Wayne Luk, Philip H. W. Leong, Steven J. E. Wilton
2011· article· en· IEEE Transactions on Very Large Scale Integration (VLSI) Systems· Engineering
distilled prediction:candidate · metaepi_narrowconsensus · none
13
citations
affunlabeled
Two-Stage, Pipelined Register Renaming
Elham Safi, Andreas Moshovos, Andreas Veneris
2010· article· en· IEEE Transactions on Very Large Scale Integration (VLSI) Systems· Computer Science
distilled prediction:candidate · metaepi_narrowconsensus · none
12
citations
affunlabeled
Time-Domain Arithmetic Logic Unit With Built-In Interconnect
Fnu Aurangozeb, AKM Delwar Hossain, Can Ni, Quazi Sharar, Masum Hossain
2017· article· en· IEEE Transactions on Very Large Scale Integration (VLSI) Systems· Engineering
distilled prediction:candidate · metaepi_narrowconsensus · none
10
citations
affunlabeled
POMR: a power-aware interconnect optimization methodology
Ahmed A. F. Youssef, Mohab Anis, M. Elmasry
2005· article· en· IEEE Transactions on Very Large Scale Integration (VLSI) Systems· Engineering
distilled prediction:candidate · metaepi_narrowconsensus · none
9
citations
afffundunlabeled
A Stagger-Tuned Transimpedance Amplifier
Mohammad Hossein Taghavi, Peyman Ahmadi, Leonid Belostotski, J.W. Haslett
2015· article· en· IEEE Transactions on Very Large Scale Integration (VLSI) Systems· Engineering
distilled prediction:candidate · metaepi_narrowconsensus · none
9
citations
affunlabeled
Total Power Modeling in FPGAs Under Spatial Correlation
Hossam Hassan, Mohab Anis, M. Elmasry
2009· article· en· IEEE Transactions on Very Large Scale Integration (VLSI) Systems· Engineering
distilled prediction:candidate · metaepi_narrowconsensus · none
9
citations
afffundunlabeled
A Parametric DFT Scheme for STT-MRAMs
Govind Radhakrishnan, Youngki Yoon, Manoj Sachdev
2019· article· en· IEEE Transactions on Very Large Scale Integration (VLSI) Systems· Engineering
distilled prediction:candidate · metaepi_narrowconsensus · none
8
citations
affunlabeled
Integrated Power and Clock Distribution Network
S. E. Esmaeili, Asim J. Al-Kahlili
2012· article· en· IEEE Transactions on Very Large Scale Integration (VLSI) Systems· Engineering
distilled prediction:candidate · metaepi_narrowconsensus · none
8
citations
affunlabeled
Memory Optimized Hardware Implementation of Open FEC Encoder
Abolfazl Zokaei, Dmitri Truhachev, Kamal El‐Sankary
2022· article· en· IEEE Transactions on Very Large Scale Integration (VLSI) Systems· Engineering
distilled prediction:candidate · metaepi_narrow+insufficient_payloadconsensus · none
8
citations
affunlabeled
A SET/MOS Hybrid Multiplier Using Frequency Synthesis
Guoqing Deng, Chunhong Chen
2012· article· en· IEEE Transactions on Very Large Scale Integration (VLSI) Systems· Physics and Astronomy
distilled prediction:candidate · metaepi_narrow+insufficient_payloadconsensus · none
8
citations
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