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4,299,418 works, Canadian by any of four routes.

Every filter state is a URL; the URL is the query; the query is citable via /q/⟨hash⟩. The page, the API and the export parse the same parameters.

The current cohort, streamed from the database: every work column, the machine labels, the provisional scores, and the per-row validation status. Exports are capped at 100,000 rows. Mints a permanent /q/ link for this exact query. The same filters always produce the same link, whoever asks.

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IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Direct Codex and Gemma labels are unvalidated and sparse. Distilled predictions cover the full frame and are also unvalidated. Choose the evidence source explicitly; absence of a direct label is never a negative label.

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The four routes compose: require the funder route and exclude affiliation to get the funder-only stratum no affiliation-based frame ever sees.

232 results · 1 filter active ·
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20002025
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Machine labels · sparse coverage
Evidence
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An unlabeled work is unknown, not a negative. Label coverage is reported on every query.
232 works in the cohort · of 4,299,418page 2 of 5

Labels cover 0 of 232 works in this cohort. The rest are unlabeled, which is not a negative label: the label table is sparse today and grows as labeling rounds land.

Distilled predictions cover 232 of 232 works in this cohort. Predictions are machine_predicted_unvalidated. The Gemma side is a direct model label for every work (title-only); the Codex side is a distilled, calibrated classifier. Candidate is the union; consensus is the intersection.

affunlabeled
Portable, Flexible, and Scalable Soft Vector Processors
Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose
2011· article· en· IEEE Transactions on Very Large Scale Integration (VLSI) Systems· Computer Science
machine prediction:candidate · noneconsensus · none
27
citations
affunlabeled
Design and Evaluation of a Hybrid Chaotic-Bistable Ring PUF
Madhan Thirumoorthi, Marko Jovanovic, Mitra Mirhassani, Mohammed Khalid
2021· article· en· IEEE Transactions on Very Large Scale Integration (VLSI) Systems· Computer Science
machine prediction:candidate · noneconsensus · none
25
citations
afffundunlabeled
The Costs of Confidentiality in Virtualized FPGAs
Sadegh Yazdanshenas, Vaughn Betz
2019· article· en· IEEE Transactions on Very Large Scale Integration (VLSI) Systems· Computer Science
machine prediction:candidate · noneconsensus · none
25
citations
afffundunlabeled
Routability of Network Topologies in FPGAs
Manuel Saldaña, Lesley Shannon, Yue Jia, Sikang Bian, Jeffrey Craig, Paul Chow
2007· article· en· IEEE Transactions on Very Large Scale Integration (VLSI) Systems· Computer Science
machine prediction:candidate · noneconsensus · none
21
citations
afffundunlabeled
Optimizing FPGA Logic Block Architectures for Arithmetic
Kevin E. Murray, Jason Luu, Matthew Walker, Conor McCullough, Sen Wang, Safeen Huda +6 more
2020· article· en· IEEE Transactions on Very Large Scale Integration (VLSI) Systems· Engineering
machine prediction:candidate · noneconsensus · none
20
citations
affunlabeled
Practical Asynchronous Interconnect Network Design
B.R. Quinton, Mark R. Greenstreet, Steven J. E. Wilton
2008· article· en· IEEE Transactions on Very Large Scale Integration (VLSI) Systems· Engineering
machine prediction:candidate · noneconsensus · none
20
citations
afffundunlabeled
Preweighted Linearized VCO Analog-to-Digital Converter
Karama M. Al-Tamimi, Kamal El‐Sankary
2017· article· en· IEEE Transactions on Very Large Scale Integration (VLSI) Systems· Engineering
machine prediction:candidate · noneconsensus · none
18
citations

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